ISP1760ETGA STEricsson, ISP1760ETGA Datasheet - Page 39

• Manufacturer Part Number: ISP1760ETGA
• Manufacturer: STEricsson

Specifications of ISP1760ETGA

• Package Type: TFBGA
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Table 30.
Table 31.
Table 32.
CD00222702
Product data sheet
Bit
31 to 0
Bit
31 to 0
Bit
31 to 0
Symbol
INT_PTD_LAST
_PTD[31:0]
Symbol
ATL_PTD_DONE_
MAP[31:0]
Symbol
ATL_PTD_SKIP_
MAP[31:0]
INT PTD Last PTD register (address 0148h) bit description
ATL PTD Done Map register (address 0150h) bit description
ATL PTD Skip Map register (address 0154h) bit description
8.2.12 INT PTD Last PTD register
8.2.13 ATL PTD Done Map register
8.2.14 ATL PTD Skip Map register
8.2.15 ATL PTD Last PTD register
The bit description of the register is given in
Once the LastPTD bit corresponding to a PTD is set, this will be the last PTD processed
(checking V = 1) in that PTD category. Subsequently, the process will restart with the first
PTD of that group. This is useful to reduce the time in which all the PTDs, the respective
memory space, would be checked, especially if only a few PTDs are defined. The
LastPTD bit must be normally set to a higher position than any other position from an
active PTD.
Table 31
This register represents a direct map of the done status of the 32 PTDs. The bit
corresponding to a certain PTD will be set to logic 1 as soon as that PTD execution is
completed. Reading the Done Map register will clear all the bits that are set to logic 1, and
the next reading will reflect the updated status of new executed PTDs.
The bit description of the register is given in
When a bit in the PTD Skip Map is set to logic 1 that PTD will be skipped although its V bit
may be set. The information in that PTD is not processed.
The bit description of the ATL PTD Last PTD register is given in
Access Value
R/W
Access
R
Access
R/W
shows the bit description of the ATL PTD Done Map register.
0000 0000h
Value
0000 0000h
Value
FFFF FFFFh
Rev. 08 — 13 April 2010
Description
INT PTD Last PTD: Last PTD of the 32 PTDs as indicated by the 32
bitmap.
1h — One PTD in INT
2h — Two PTDs in INT
3h — Three PTDs in INT
Description
ATL PTD Done Map: Done map for each of the 32 PTDs for
the ATL transfer
Description
ATL PTD Skip Map: Skip map for each of the 32 PTDs for the
ATL transfer
Table
Table
Embedded Hi-Speed USB host controller
30.
32.
Table
© ST-ERICSSON 2010. All rights reserved.
33.
ISP1760
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