SCD128410QCE Intel, SCD128410QCE Datasheet - Page 130

• Manufacturer Part Number: SCD128410QCE
• Manufacturer: Intel

Specifications of SCD128410QCE

• Pin Count: 100
• Lead Free Status / RoHS Status: Not Compliant

CD1284 — IEEE 1284-Compatible Parallel Interface Controller
7.5.2
7.5.3
130
Register Name: MCOR2
Register Description: Modem Change Option Register 2
Access: Read/Write
Register Name: MSVR1
Register Description: Modem Signal Value Register 1
Access: Read/Write
DSRod
DSR
Bit 7
Bit 7
Bit
7:4
3:0
Bit
7:4
3:0
Modem Change Option Register 2
Modem Signal Value Register 1
DSRzd, CTSzd, RIzd and CDzd: Each of these bits controls its corresponding input pin. If the bit is set, the
function is enabled and transitions from one-to-zero (zeros detect) generate an SVCREQM* service request.
DTRth3 through DTRth0: These bits form a binary value to determine when the DTR output is negated
(based on the number of characters in the receive FIFO). When the FIFO holds more characters than this
value, DTR is negated, informing the remote to stop transmission. This value must be set to a value
numerically larger than the value set for the receive FIFO threshold in COR3.
DSRod, CTSod, RIod, CDod: Each of these bits controls its corresponding input pin. If the bit is set, the
function is enabled and transitions from ‘0’-to-‘1’ (ones detect) generate an SVCREQM* service request.
These bits are not used and must be ‘0’.
CTSod
DTRth3
Bit 6
Bit 6
CTS
0
0
0
1
1
1
1
1
•
DTRth2
0
0
0
0
1
1
1
1
•
RIod
Bit 5
Bit 5
RI
DTRth1
0
0
1
1
0
0
1
1
•
CDod
Bit 4
Bit 4
CD
DTRth0
0
1
0
1
0
1
0
1
•
Description
Description
Automatic DTR mode disabled.
1 character
2 characters
11 characters
12 characters
Not used.
Bit 3
Bit 3
0
0
Number of Characters in FIFO
Bit 2
Bit 2
0
0
Bit 1
Bit 1
8-Bit Hex Address: 6C
8-Bit Hex Address: 16
0
0
Default Value: 00
Default Value: XX
Datasheet
Bit 0
Bit 0
RTS
0