SCD128410QCE Intel, SCD128410QCE Datasheet - Page 26

• Manufacturer Part Number: SCD128410QCE
• Manufacturer: Intel

Specifications of SCD128410QCE

• Pin Count: 100
• Lead Free Status / RoHS Status: Not Compliant

CD1284 — IEEE 1284-Compatible Parallel Interface Controller
26
DER
DMABUF
(H)
DMABUF
(L)
HRSR
LIVR
PACR
PCRR
PFCR
PFEP
PFFP
PFHR1
PFHR2
PFQR
PFSR
PFTR
RLCR
SDTCR
SDTPR
EAR
HTVR
IVR
MDR
NER
NSR
ODR
OVR
PCIER
PCISR
PCR
SCR
Name
Name
Table 6.
Table 7.
Hex
2D
2E
2B
2A
Hex
25
24
21
28
29
22
23
20
6C
3A
3B
3D
3C
33
30
30
34
18
3F
31
39
38
35
36
32
37
Channel Registers — Parallel Pipeline
(Selected by Channel 0 in CAR)
Channel Registers — Parallel Port
(Selected by Channel 0 in CAR) (Sheet 1 of 2)
DMAwrerr
HTVR[7]
FIFOres
ManMd
ShrtTen
NegOK
PerBsy
HR1full
FFfull
Bit 7
Bit 7
15
0
0
0
0
0
0
0
0
0
7
0
0
DMArderr
FFempty
HTVR[6]
TimeOvr
ShrtStal
HR1tag
DMAen
PerClk
TimEn
E1284
NegFl
Bit 6
Bit 6
RID
14
0
0
0
6
0
0
0
User-Defined Bits
Bufwrerr
StaleOff
Timeout
HTVR[5]
DMAdir
AkDaRq
HR2full
HostTO
NegCh
NegCh
Data or Space Available in FIFO — Max 0x’40
Bit 5
ETxfr
Bit 5
13
5
0
0
0
0
0
8-Bit Stale Data Timeout Value
8-Bit Stale Data Timer Count
FIFOlock
Bufrderr
HR2tag
HRtag
ImedTerm
IntEn
Bit 4
HTVR[4]
Ig_SEL
TstMux
8-Bit Character Data
8-Bit Character Data
12
SigCh
SigCh
8-Bit Binary Value
xFlag
4
0
Bit 4
8-Bit Binary Data
EPP
7-Bit Unsigned Binary Count
0
0
DMA Transfer Threshold
6-Bit Binary FIFO Pointer Value
6-Bit Binary FIFO Pointer Value
HR1wrerr
ClearTO
DMAfull
HRdata
RLEen
Bit 3
11
HTVR[3]
3
0
EPPAW
EPPAW
nDatAv
A1284
A1284
ClrPs
Bit 3
RLE
HTmrTst[1:0]
4-Bit Negotiation Result Code
DMAmpty
HR1rderr
setTAG
Stale
Bit 2
IT2
HTVR[2]
10
2
0
0
DirCh
SetPs
DirCh
Bit 2
ECP
nInit
nInit
0
AsyncDMA
HR2wrerr
OneChar
DMAact
HTVR[1]
ErrEn
Bit 1
HstBsy
HstBsy
MMDir
IDReq
IDReq
IT1
EPIrq
Bit 1
RVB
9
1
0
0
DMAbufWe
PChReset
HR2rderr
HTVR[0]
ManOE
DataErr
RevRq
HstClk
HstClk
Ctnot0
Unfair
nINIT
nINIT
Bit 0
RVN
Bit 0
IT0
0
8
0
Datasheet
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