MC9S12XDT512MAA Freescale, MC9S12XDT512MAA Datasheet - Page 1220
MC9S12XDT512MAA
Manufacturer Part Number
MC9S12XDT512MAA
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDT512MAA.pdf
(1348 pages)
Specifications of MC9S12XDT512MAA
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
MC9S12XDT512MAA
Manufacturer:
Freescale Semiconductor
Quantity:
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Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
29.4.2.5
The mass erase operation will erase all addresses in a Flash block using an embedded algorithm.
An example flow to execute the mass erase operation is shown in
write sequence is as follows:
If a Flash block to be erased contains any protected area, the PVIOL flag in the FSTAT register will set and
the mass erase command will not launch. Once the mass erase command has successfully launched, the
CCIF flag in the FSTAT register will set after the mass erase operation has completed unless a new
command write sequence has been buffered.
1222
1. Write to a Flash block address to start the command write sequence for the mass erase command.
2. Write the mass erase command, 0x41, to the FCMD register.
3. Clear the CBEIF flag in the FSTAT register by writing a 1 to CBEIF to launch the mass erase
The address and data written will be ignored.
command.
Mass Erase Command
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure
29-28. The mass erase command
Freescale Semiconductor
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