MC9S12XDT512MAA Freescale, MC9S12XDT512MAA Datasheet - Page 573

• Manufacturer Part Number: MC9S12XDT512MAA
• Manufacturer: Freescale

Specifications of MC9S12XDT512MAA

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 59
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

15.3.2
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Freescale Semiconductor
0x7FFF0A
0x7FFF0B
0x7FFF00
0x7FFF01
0x7FFF02
0x7FFF03
0x7FFF04
0x7FFF05
0x7FFF06
0x7FFF07
0x7FFF08
0x7FFF09
Address
Global
BDMCCRH R
Register Descriptions
BDMCCRL R
BDMGPR
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
BDMSTS
Register
Name
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
ENBDM
CCR7
BGAE
Bit 7
X
X
X
X
X
X
0
0
0
0
Figure 15-2. BDM Register Summary
MC9S12XDP512 Data Sheet, Rev. 2.21
= Unimplemented, Reserved
= Indeterminate
BDMACT
CCR6
BGP6
X
X
X
X
X
6
0
0
0
0
CCR5
BGP5
X
X
X
X
X
5
0
0
0
0
0
CCR4
BGP4
SDV
4
X
X
X
X
X
0
0
0
0
Chapter 15 Background Debug Module (S12XBDMV2)
Figure
TRACE
CCR3
BGP3
X
X
X
X
X
3
0
0
0
0
0
15-2. Registers are accessed by
= Implemented (do not alter)
= Always read zero
CLKSW
CCR10
CCR2
BGP2
X
X
X
X
X
2
0
0
0
UNSEC
CCR1
CCR9
BGP1
X
X
X
X
1
0
0
0
0
CCR0
CCR8
BGP0
Bit 0
X
X
X
X
0
0
0
0
0
573