MC9S12XDT512MAA Freescale, MC9S12XDT512MAA Datasheet - Page 899
MC9S12XDT512MAA
Manufacturer Part Number
MC9S12XDT512MAA
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDT512MAA.pdf
(1348 pages)
Specifications of MC9S12XDT512MAA
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Chapter 23
DQ256 Port Integration Module (S12XDQ256PIMV2)
Introduction
The S12XD family port integration module (below referred to as PIM) establishes the interface between
the peripheral modules including the non-multiplexed external bus interface module (S12X_EBI) and the
I/O pins for all ports. It controls the electrical pin properties as well as the signal prioritization and
multiplexing on shared pins.
This document covers the description of:
Most I/O pins can be configured by register bits to select data direction and drive strength, to enable and
select pull-up or pull-down devices. Interrupts can be enabled on specific pins resulting in status flags.
The I/O’s of 2 MSCAN and 3 SPI modules can be routed from their default location to alternative port
pins.
23.0.1
A full-featured PIM module includes these distinctive registers:
Freescale Semiconductor
•
•
•
•
•
•
•
•
•
•
•
Port A, B used as address output of the S12X_EBI and Port C, D used as data I/O of the S12X_EBI
Port E associated with the S12X_EBI control signals and the IRQ, XIRQ interrupt inputs
Port K associated with address output and control signals of the S12X_EBI
Port T connected to the Enhanced Capture Timer (ECT) module
Port S associated with 2 SCI and 1 SPI modules
Port M associated with 3 MSCAN modules
Port P connected to the PWM and 2 SPI modules — inputs can be used as an external interrupt
source
Port H associated with 1 SCI module — inputs can be used as an external interrupt source
Port J associated with 1 MSCAN, 1 SCI, and 1 IIC module — inputs can be used as an external
interrupt source
Port AD0 and AD1 associated with one 8-channel andone 16-channel ATD module
Data and data direction registers for Ports A, B, C, D, E, K, T, S, M, P, H, J, AD0, and AD1 when
used as general-purpose I/O
Features
The implementation of the PIM is device dependent. Therefore some
functions are not available on certain derivatives or 112-pin and 80-pin
package options.
MC9S12XDP512 Data Sheet, Rev. 2.21
NOTE
901
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