A80960HD80S L2GK Intel, A80960HD80S L2GK Datasheet - Page 38
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A80960HD80S L2GK
Manufacturer Part Number
A80960HD80S L2GK
Description
Manufacturer
Intel
Datasheet
1.A80960HD80S_L2GK.pdf
(104 pages)
Specifications of A80960HD80S L2GK
Family Name
i960
Device Core Size
32b
Frequency (max)
80MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.45V
Operating Supply Voltage (min)
3.15V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
168
Package Type
CPGA
Lead Free Status / RoHS Status
Compliant
80960HA/HD/HT
4.3
4.4
38
Figure 7. VCC5 Current-Limiting Resistor
Recommended Connections
Power and ground connections must be made to multiple V
80960Hx-based circuit board should include power (V
distribution. Every V
connected to the ground plane. Pins identified as “NC” —no connect pins—must not be connected
in the system.
Liberal decoupling capacitance should be placed near the 80960Hx. The processor may cause
transient power surges when its output buffers transition, particularly when connected to large
capacitive loads.
Low inductance capacitors and interconnects are recommended for best high-frequency electrical
performance. Inductance may be reduced by shortening the board traces between the processor and
decoupling capacitors as much as possible. Capacitors specifically designed for PGA packages
offer the lowest possible inductance.
For reliable operation, always connect unused inputs to an appropriate signal level. In particular,
any unused interrupt (XINT7:0, NMI) input should be connected to V
as should BTERM when not used. Pull-up resistors should be in the range of 20 K for each pin
tied high. When READY or HOLD are not used, the unused input should be connected to ground.
N.C. pins must always remain unconnected.
VCC5 Pin Requirements (V
In mixed-voltage systems that drive 80960Hx processor inputs in excess of 3.3 V, the VCC5 pin
must be connected to the system’s 5 V supply. To limit current flow into the VCC5 pin, there is a
limit to the voltage differential between the VCC5 pin and the other V
differential between the 80960Hx VCC5 pin and its 3.3 V V
This limit applies to power-up, power-down, and steady-state operation.
requirement.
Meeting this requirement ensures proper operation and ensures that the current draw into the VCC5
pin does not exceed the I
When the voltage difference requirements cannot be met due to system design limitations, an
alternate solution may be employed. As shown in
may be used to limit the current into the VCC5 pin. This resistor ensures that current drawn by the
VCC5 pin does not exceed the maximum rating for this pin.
This resistor is not necessary in systems that may ensure the V
In 3.3 V-only systems and systems that drive 80960Hx pins from 3.3 V logic, connect the VCC5
pin directly to the 3.3 V V
CC
pin must be connected to the power plane; every V
CC5
CC
specification.
plane.
+5 V (±0.25 V)
DIFF
(±5%, 0.5 W)
100
Figure
)
CC
VCC5 Pin
) and ground (V
7, a minimum of 100
CC
CC
and V
DIFF
pins should never exceed 2.25 V.
specification.
SS
CC
CC
(GND) pins. Every
through a pull-up resistor,
Table 21
SS
pins. The voltage
SS
) planes for power
pin must be
series resistor
outlines this
Datasheet