A80960HD80S L2GK Intel, A80960HD80S L2GK Datasheet - Page 73
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A80960HD80S L2GK
Manufacturer Part Number
A80960HD80S L2GK
Description
Manufacturer
Intel
Datasheet
1.A80960HD80S_L2GK.pdf
(104 pages)
Specifications of A80960HD80S L2GK
Family Name
i960
Device Core Size
32b
Frequency (max)
80MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.45V
Operating Supply Voltage (min)
3.15V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
168
Package Type
CPGA
Lead Free Status / RoHS Status
Compliant
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Datasheet
Figure 48. Terminating a Burst with BTERM
BE3:0, LOCK
A31:4, SUP,
CT3:0, D/C,
BTERM
READY
BLAST
CLKIN
D31:0,
DP3:0
PCHK
WAIT
DT/R
DEN
ADS
A3:2
W/R
Note: READY adds memory access time to data transfers, whether or not the
bus access is a burst access. BTERM interrupts a bus access, whether or not
the bus access has more data transfers pending. Either the READY signal or
the BTERM signal terminates a bus access when the signal is asserted during
the last (or only) data transfer of the bus access.
A
D
00
1
D0
A
N
Quad-Word Read Request
RAD
D
01
= 0, N
Ready Enabled
1
Valid
D1
RDD
A
= 0, N
See Note
D
10
RDA
= 0
1
D2
D
11
1
D3
80960HA/HD/HT
73
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