A80960HD80S L2GK Intel, A80960HD80S L2GK Datasheet - Page 48

A80960HD80S L2GK

Manufacturer Part Number
A80960HD80S L2GK
Description
Manufacturer
Intel
Datasheet

Specifications of A80960HD80S L2GK

Family Name
i960
Device Core Size
32b
Frequency (max)
80MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.45V
Operating Supply Voltage (min)
3.15V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
168
Package Type
CPGA
Lead Free Status / RoHS Status
Compliant
80960HA/HD/HT
48
Figure 15. Hold Acknowledge Timings
Figure 16. Bus Backoff (BOFF) Timings
T
The minimum output delay is referred to as the Output Hold (T
T
during which synchronous inputs must be stable for correct processor operation.
OV
IS
T
T
IH
OH
— INPUT SETUP AND HOLD - The input setup and hold requirements specify the sampling window
— OUTPUT DELAY - The maximum output delay is referred to as the Output Valid Delay (T
CLKIN
HOLDA
CLKIN
BOFF
HOLD
1.5 V
1.5 V
T
Min
T
IH
IH
1.5 V
1.5 V
T
T
Min
OH1
IS
1.5 V
T
IS
1.5 V
1.5 V
T
T
Min
OV1
T
IH
Min
1.5 V
IH
1.5 V
Max
OH
).
T
Min
T
IS
1.5 V
1.5 V
OH1
T
IS
1.5 V
T
OV1
1.5 V
Min
1.5 V
Max
1.5 V
Datasheet
OV
).

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