A80960HD80S L2GK Intel, A80960HD80S L2GK Datasheet - Page 70

A80960HD80S L2GK

Manufacturer Part Number
A80960HD80S L2GK
Description
Manufacturer
Intel
Datasheet

Specifications of A80960HD80S L2GK

Family Name
i960
Device Core Size
32b
Frequency (max)
80MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.45V
Operating Supply Voltage (min)
3.15V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
168
Package Type
CPGA
Lead Free Status / RoHS Status
Compliant
80960HA/HD/HT
70
Figure 45. Burst, Pipelined Read Request with Wait States, 8-Bit Bus
PMCON
A31:4, SUP,
CT3:0, D/C,
Function
Value
BE1/A1,
BE0/A0
BLAST
D31:0,
DP3:0
CLKIN
LOCK
PCHK
WAIT
Bit
A3:2
DT/R
DEN
W/R
ADS
1. Non-pipelined request concludes, pipelined reads begin
2. Pipelined reads conclude, non-pipelined requests begin
NOTE: Bits 31-30, 27-25, 13, and 5 are reserved.
External
Control
Ready
29
X
x
1
Enabled
Burst
28
A
1
A1:0 = 00
2
Lining
Pipe-
ON
24
1
1
Width
23-22
8-Bit
Bus
A3:2 = 00, 01, 10, or 11
00
D
Byte 0
A1:0 = 01
D7:0
1
Parity
Odd
Valid
21
X
x
D
Byte 1
A1:0 = 10
D7:0
Enabled
Enable
Parity
20
1
1
19-16
N
D
xxxx
Byte 2
A1:0 = 11
XDA
X
D7:0
1
N
15-14
WDD
xx
X
A’
D
Byte 3
D7:0
N
xxxxx
12-8
2
Valid
WAD
X
Valid
Valid
1
N
7-6
01
RDD
1
D’
valid
valid
valid
valid
In-
In-
In-
In-
D7:0
D’
2
00010
N
Datasheet
4-0
RAD
2

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