KC80526LY400128 Intel, KC80526LY400128 Datasheet

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... Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products. Information contained herein supersedes previously published specifications on these devices from Intel © ...

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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800- 548-4725 or by visiting Intel’s web site at http://www.intel.com Copyright © ...

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... Stop Grant State.....................................22 4.4.5 Quick Start State.....................................22 4.4.6 HALT/Grant Snoop State........................22 4.4.7 Sleep State .............................................22 4.4.8 Deep Sleep State....................................23 Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz CONTENTS 4.5 Typical POS/STR Power.................................23 4.6 Electrical Requirements ..................................24 4.6.1 DC Requirements ...

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... Figure 14. Thermal Transfer Plate (A) ................................38 Figure 15. Thermal Transfer Plate (B) ................................39 Figure 16. Standoff Holes, Board Edge Clearance, and EMI Containment Ring ..............................................40 Figure 17. Product Tracking Code ......................................41 Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz TABLES Table 1. Module Connector Signal Summary........................7 Table 2 ...

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... Celeron processor mobile module. The PIIX4E/M provides extensive power management capabilities and supports the second integrated device, the Intel 82443DX Host Bridge. Key features of the Intel 82443DX Host Bridge system controller include the DRAM controller, which supports EDO at 3.3 volts with a burst read at 7-2-2-2 (60 nanoseconds) or SDRAM at 3 ...

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... Figure 1 illustrates the block diagram of the Celeron processor mobile module MMC-1. Processor Core Voltage CPU Volt. Reg. Figure 1. Block Diagram of the Celeron Processor Mobile Module MMC-1 Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Mobile Celeron ...

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... Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz 3.1 Signal Definition Table 1 provides a list of signals by category and the corresponding number of signals in each category. For proper signal termination, please contact your Intel sales representative for further information. Number of Pins 108 56 9 ...

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... Open-drain GTL+ interface signal PCI PCI bus interface signals CMOS The CMOS buffers are low voltage TTL compatible signals with 3.3-volt outputs and 5.0-volt tolerant inputs. Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz 8 ...

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... Host Bridge system controller has two identical sets of address lines (MAA CMOS MAB[10] and MAB#). The Celeron processor mobile module MMC-1 supports only the MAB set of address lines. For additional addressing features, please refer to the Intel MAB[12:11]# PCIset Datasheet. MAB[13] ...

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... Parity: A single parity bit is provided over AD[31:0] and C/BE[3:0]#. PCI SERR# I/O V_3 System Error: The 82443DX asserts this signal to indicate an error condition. Please refer to the Intel PCI CLKRUN# I/O D V_3 Clock Run: An open-drain output and input. The 82443DX Host Bridge requests the central resource (PIIX4E/M) to start or maintain the PCI clock by asserting CLKRUN# ...

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... NMI Status and Control Register is programmed. This signal is an open-drain. A20M# ID V_CPUIO Address Bit 20 Mask: When enabled, this open-drain signal causes the processor to emulate the address wraparound at 1 MB, which occurs on the Intel 8086 processor. CMOS SMI# ID V_CPUIO System Management Interrupt: SMI active low synchronous output from the ...

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... CMOS NOTE: V_3ALWAYS is a 3.3-V supply generated whenever V_DC is available and supplied to PIIX4E/M resume well. Intel Celeron At 400 MHz, 366 MHz, 333 MHz, and 300 MHz solely for the digital thermal sensor, the SMBus contains reserved serial addresses for future use. See Section 4.9 for more details ...

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... Clock Voltage Select: Provides status to the system electronics about the voltage level at which the CKDM66-M clock generator should be operating. This signal is pulled low CMOS by module. Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Table 6. Clock Signal Descriptions ...

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... MMC-1and should not be connected. ITP0 NOTE: DBREST# (reset target system) on the ITP debug port can be “logically ANDed” with VR_PWRGD TO PIIX4E/M’s PWROK. Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Table 7. Voltage Descriptions Description Table 8 ...

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... This signal is allowed to float on the module and requires a 100-K pullup resistor to V_3S on the system electronics. This signal is grounded. Ground I 32 Ground. Reserved RSVD 8 Unallocated Reserved pins and should not be connected. Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Table 9. Miscellaneous Pins Description 15 ...

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... MD15 40 GND 41 MD10 42 MD13 43 MD09 44 MD08 45 V_3S Intel Celeron At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Section 3.3, “Pin and Pad Assignments” for the pin assignments of the pads on the connector. Table 10. Connector Pin Assignments Row Row GND GND ...

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... MD36 62 MD33 63 MD35 64 MD32 65 MD34 66 V_3S 67 OEM_PD 68 FQS0 69 HCLK1 70 GND Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Row Row AB BA MD42 AD23 MD40 AD24 MD44 AD25 MD46 AD26 GND GND MD47 AD27 AD28 ...

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... For size information, refer to Section Figure 2. 280-Pin Connector Footprint Pad Numbers, Module Secondary Side Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz 5.1.4 “Height Restrictions”. Figure 2 shows the connector pad assignments for the manufacturer’s system electronics ...

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... The 82443DX Host Bridge System Controller Intel’s 82443DX Host Bridge system controller combines the mobile Celeron processor bus controller, the DRAM controller, and the PCI bus controller into one component. The 82443DX Host Bridge has multiple power management ...

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... IDSEL. AD18 should be used by the PIIX4E/M. 4.3.4 AGP Feature Set The Intel MMC-1 family does not support the AGP graphics port interface. For AGP information, refer to the Intel Intel Celeron At 400 MHz, 366 MHz, 333 MHz, and 300 MHz 4 ...

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... HS – Processor Halt State QSE – Quick Start State Enabled SGA – Stop Grant Acknowledge bus cycle issued Stop break – BINIT#, FLUSH#, RESET# Intel mobile modules do not support the shaded clock control states Figure 3. Clock Control States Intel Celeron Processor Mobile Module MMC-1 ...

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... Halt state. 4.4.4 Stop Grant State Intel mobile modules do not support the Stop Grant state. The processor enters this mode with the assertion of the STPCLK# signal when it is configured for Stop Grant state (via the A15# strapping option). The processor still responds to snoop requests and latch interrupts ...

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... Sleep To Stop Grant state 10 bus clocks Deep Sleep 30 msec NOTES: 1. Intel mobile modules do not support shaded clock control states. 2. Not 100% tested. Specified design/characterization. 4.5 Typical POS and STR Power Table 14 lists the POS and STR typical power specifications. These are average values of measurement and are guidelines only. ...

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... I Processor Clock Rail Current CLK NOTES: 1. Unless otherwise noted, all specifications in this table apply to all Intel mobile module frequencies. 2. V_DC is set for 12V in order to determine typical V_DC current. 3. V_DC is set for 5V in order to determine maximum V_DC current. 4. Leakage current that can be expected when VR_ON is deactivated and V_DC is still applied. ...

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... BCLK Fall Time NOTES: 1. Unless otherwise noted, all specifications in this table apply to all Intel mobile modules. 2. All AC timings for the GTL+ signals are referenced to the BCLK rising edge at 1.25V at the processor core pin. All GTL+ signal timings (address bus, data bus, etc.) are referenced at 1.00V at the processor core pins. ...

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... Falling Edge Ringback BCLK rising/falling slew-rate NOTES: 1. Unless otherwise noted, all specifications in this table apply to all Intel mobile modules. 2. BCLK must rise and fall monotonically between V IL,BCLK and V IH, BCLK. 3. The mobile Celeron processor PSB clock overshoot and undershoot specification for 66-megahertz operation. ...

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... V_5(s) => 4.5 volts and V_DC => 4.75 volts. Caution- Turning on VR_ON prior to meeting these conditions will severely damage the Celeron processor mobile module. Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz 3 2 ...

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... This signal should not and can not be pulled up by the system electronics the power-on process, Intel recommends to raise the higher voltage power plane first (V_DC), followed by the lower power planes (V_5, V_3), and finally assert VR_ON after above voltage levels are met on all rails. The power-off process should be the reverse process, i ...

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... VR_ON Valid-Low Time: This specifies how long VR_ON needs to be low for a valid off before VR_ON can be turned back on again. In going from a valid on to off and then back on, the following conditions must be met to prevent damage to the OEM system or the Intel mobile module: VR_ON must be low for 1 millisecond. ...

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... ESR of 0.15 ohms total. The MMC-1 connector is approximately 30 milliohms of series resistance, for a total series resistance of .18 ohms. If the user powers the system Figure 6. Instantaneous In-rush Current Model Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz ESR ...

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... Semiconductor capacitors must be used as input bulk capacitance in the voltage regulator circuit. Because of the capacitor’s susceptibility to high in-rush current, special care Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz must be taken. One way to soften the in-rush current and ...

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... Maximum current during the voltage ramping is: As shown in the circuit in Figure 8: t_delay = 5.53 ms; t_tran = 14.0 ms; and I_max = 146 mA. Intel Celeron At 400 MHz, 366 MHz, 333 MHz, and 300 MHz UNDER_VOLTAGE_LOCKOUT circuit allows R4 to pull up the gate start a turn-on sequence. M3 pulls its drain toward ground, forcing current to flow through R2 ...

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... The output of this circuit, pin 1 of the LM339 comparator open- collector output low when the applied voltage at PWR is V_uv_lockout Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz system V_DC to provide the most protection. If all power is logically “ ...

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... NOTE: The thermal sensor used is compliant with SMBus addressing. Please refer to the Pentium® II processor Thermal Sensor Interface Specification. Intel Celeron At 400 MHz, 366 MHz, 333 MHz, and 300 MHz 21 volts. The output of this circuit, Pin 14 of the LM339 comparator open collector output low when the applied voltage at PWR is more than 21 volts ...

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... Standby mode. The thermal sensor will still perform temperature conversions in Standby mode when it receives a one-shot command. However, the result of a one-shot command during Auto Convert mode is not guaranteed. Intel does not recommend using the one-shot command to monitor temperature when the processor is active, only Auto Convert mode should be used ...

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... Intel mobile modules. Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Note: Ensure that the mechanical restraining method or system-level EMI contacts are able to support this range of PCB thickness for compatibility with future Intel mobile modules. 36 ...

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... The mating connector sizes are 4 millimeters, 6 millimeters millimeters. These three options provide the system manufacturer with flexibility in choosing components between the two boards. Information on these connectors can be obtained from your local Intel representative. Figure 13. Keep-out Zone min: 0.90 mm max: 1. ...

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... The thermal interface block should be secured with 2.0-millimeter screws using a maximum torque of 1.5 Kg*cm to 2.0 Kg*cm (equivalent to Intel Celeron At 400 MHz, 366 MHz, 333 MHz, and 300 MHz 0.147 N*m to.197 N*m). The thread length of the 2.00- millimeter screws should be 2 ...

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... See Figure 11 for mounting hole locations. These hole locations and board edge clearances will remain fixed for all Intel mobile modules. Intel recommends that all three mounting holes are used to ensure long term mechanical reliability and EMI integrity of the system ...

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... During all operating environments, the processor temperature TDP is a thermal solution design reference point for OEM thermal solution readiness for total module power. module Intel Celeron Processor Mobile Module MMC-1 At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Hole detail, 3 places 3.81+/-0. ...

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... B CCC DD EEE FF Note: For other Intel mobile modules, the second field (B) is defined as: Celeron processor mobile module (MMC- The second tracking method OEM generated software utility. Four strapping resistors located on the Celeron processor mobile module MMC-1determine its production level. If connected and terminated properly module- revision levels can be determined ...

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... The environmental standards for the Celeron processor mobile module MMC-1 are defined in Table 25. Parameter Temperature Cycle Humidity Voltage Shock Vibration ESD Damage Intel Celeron At 400 MHz, 366 MHz, 333 MHz, and 300 MHz Table 25. Environmental Standards Condition Non-operating Operating Unbiased 85% relative humidity V_5 V_3 ...