KC80526LY400128 Intel, KC80526LY400128 Datasheet - Page 13

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KC80526LY400128

Manufacturer Part Number
KC80526LY400128
Description
Manufacturer
Intel
Datasheet

Specifications of KC80526LY400128

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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3.1.6
Table 6 lists the clock interface signals.
OEM_PD
PCLK
HCLK[1:0]
SUSCLK
FQS[1:0]
CPU3.3_2.5#
Name
Clock (8 Signals)
CMOS
CMOS
CMOS
CMOS
CMOS
Type
PCI
N/C
O
O
I
I
I
V_CPUIO
V_CPUIO
Voltage
V_3S
V_3S
V_3
V_3
OEM Pulldown: It is renamed from PCI_REF and is not required on the module.
PCI Clock In: PCLK is an input to the module from the CKDM66-M clock source and is
one of the system’s PCI clocks. This clock is used by all of the 82443DX Host Bridge
logic in the PCI clock domain. This clock is stopped when the PIIX4E/M PCI_STP#
signal is asserted and/or during all suspend states.
Host Clock In: These clocks are inputs to the module from the CKDM66-M clock source
and are used by the processor and the 82443DX Host Bridge system controller. This
clock is stopped when the PIIX4E/M CPU_STP# signal is asserted and/or during all
suspend states.
Suspend Clock : This signal is not used on the module.
Frequency Status: This signal provides the status of the host clock frequency to the
system electronics. These signals are static and are pulled either low or high to the
V_3S voltage supply through a 10-K resistor. This module is designed for the 66-MHz
strapping option shown below.
Clock Voltage Select: Provides status to the system electronics about the voltage level
at which the CKDM66-M clock generator should be operating. This signal is pulled low
by module.
Table 6. Clock Signal Descriptions
FQS1
0
0
1
1
FQS0
0
1
0
1
Intel Celeron
Frequency
60 MHz
66 MHz
Reserved
Reserved
At 400 MHz, 366 MHz, 333 MHz, and 300 MHz
Description
Processor Mobile Module MMC-1
13

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