SAE81C91N Infineon Technologies, SAE81C91N Datasheet - Page 24

• Manufacturer Part Number: SAE81C91N
• Manufacturer: Infineon Technologies

Specifications of SAE81C91N

• Number Of Transceivers: 1
• Power Down Mode: Sleep
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Bit-Length Registers
BL1
Address: 00
Reset Value: 00
Bit(field)
TS1
TS2
SAM
BL2
Address: 01
Reset Value: 00
Bit(field)
SJW
SM
DI
IPOL
Note: Not defined bit positions must be ’0’ for write accesses.
Semiconductor Group
The Bit Length Registers BL1 and BL2 can only written while bit IM (MOD.0) is set.
1)
interconnection of the input comparator to the bus lines.
If the bus lines work according to the ISO specification, additional circuitry is necessary for
H
H
H
H
Function
Length of Timing Segment 1 (TSeg1).
t
Length of Timing Segment 2 (TSeg2).
t
Sample Rate
’0’:
’1’:
Note: Bit SAM should only be set to ’1’ using very low baud rates.
Function
Maximum Synchronization Jump Width.
t
Speed Mode (Defines edge used for synchronization)
’0’:
’1’:
Note: According to the CAN specification this bit should not be set to ’1’.
Digital Input
’0’:
’1’:
Input Polarity
’0’:
’1’:
TSeg1
TSeg2
SJWidth
IPOL
SAM
= (TS1 + 1)
= (TS2 + 1)
Input signal is sampled once per bit.
Input signal is sampled three times per bit.
Recessive to dominant is used.
Both edges are used.
The input signal is applied to the input comparator.
The input signal on pin RX0 is evaluated digitally.
The input comparator is inactive. Pin RX1 should be on
The input level remains unaltered.
The input level is inverted.
= (SJW + 1)
rw
rw
7
7
07Feb95@09:05h Intermediate Version
rw
rw
DI
6
6
t
t
SCL
SCL
t
SCL
. For t
. For t
. For t
TS2
rw
5
5
–
-
SCL
SCL
SCL
23
see baud-rate prescaler BRP.
see baud-rate prescaler BRP.
see baud-rate prescaler BRP.
rw
4
4
–
-
rw
3
3
–
-
SM
rw
rw
2
2
1)
TS1
V
SAE 81C90/91
SS
.
rw
rw
1
1
SJW
rw
rw
0
0