MC9S12DP512CPVE Freescale, MC9S12DP512CPVE Datasheet - Page 106

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MC9S12DP512CPVE

Manufacturer Part Number
MC9S12DP512CPVE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12DP512CPVE

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
14KB
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.25V
Operating Supply Voltage (min)
2.35/4.5V
On-chip Adc
2(8-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Conditions are shown in Table A-4 unless otherwise noted
Num C
MC9S12DP512 Device Guide V01.25
A.5.1.5 Pseudo Stop and Wait Recovery
The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in
both modes. The controller can be woken up by internal or external interrupts. After t
fetching the interrupt vector.
A.5.2 Oscillator
The device features an internal Colpitts and Pierce oscillator. The selection of Colpitts oscillator or Pierce
oscillator/external clock depends on the XCLKS signal which is sampled during reset. Pierce
oscillator/external clock mode allows the input of a square wave. Before asserting the oscillator to the
internal system clocks the quality of the oscillation is checked for each start from either power-on, STOP
or oscillator fail. t
POR or STOP if a proper oscillation is not detected. The quality check also determines the minimum
oscillator start-up time t
asserted if the frequency of the incoming clock signal is below the Assert Frequency f
1a
1b
10
11
12
13
14
15
2
3
4
5
6
7
8
9
C Crystal oscillator range (Colpitts)
C Crystal oscillator range (Pierce)
C Oscillator start-up time (Colpitts)
D Clock Quality check time-out
D External square wave pulse width low
D External square wave pulse width high
D External square wave rise time
D External square wave fall time
D Input Capacitance (EXTAL, XTAL pins)
C
C EXTAL Pin Input Hysteresis
P Startup Current
P Clock Monitor Failure Assert Frequency
P External square wave input frequency
P EXTAL Pin Input High Voltage
T EXTAL Pin Input High Voltage
P EXTAL Pin Input Low Voltage
T EXTAL Pin Input Low Voltage
DC Operating Bias in Colpitts Configuration on
EXTAL Pin
CQOUT
UPOSC
specifies the maximum time before switching to the internal self clock mode after
Rating
Table A-15 Oscillator Characteristics
. The device also features a clock monitor. A Clock Monitor Failure is
4
4
4
4
4
4
4
1
4
4
4
V
V
V
Symbol
V
V
V
HYS,EXTAL
t
t
IH,EXTAL
IH,EXTAL
IL,EXTAL
IL,EXTAL
UPOSC
CQOUT
f
t
t
t
t
DCBIAS
f
f
i
CMFA
EXTH
EXTR
f
EXTL
EXTF
OSC
OSC
OSC
C
EXT
IN
0.75*V
V
SSPLL
Min
0.45
100
0.5
0.5
0.5
9.5
9.5
50
-
-
-
-
-
-
-
-
DDPLL
- 0.3
Typ
100
250
1.1
8
7
-
-
-
-
-
-
-
-
-
-
-
-
-
2
wrs
CMFA.
V
0.25*V
DDPLL
the CPU starts
Max
100
200
2.5
16
40
50
1
1
-
-
-
-
-
-
-
-
SSPLL
3
+ 0.3
Unit
MHz
MHz
MHz
KHz
mV
ms
pF
ns
ns
ns
ns
V
V
V
V
V
s
A

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