MC9S12DP512CPVE Freescale, MC9S12DP512CPVE Datasheet - Page 90

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MC9S12DP512CPVE

Manufacturer Part Number
MC9S12DP512CPVE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12DP512CPVE

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
14KB
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.25V
Operating Supply Voltage (min)
2.35/4.5V
On-chip Adc
2(8-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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MC9S12DP512 Device Guide V01.25
The total power dissipation can be calculated from:
Two cases with internal voltage regulator enabled and disabled must be considered:
T J
T A
P D
P
INT
JA
1. Internal Voltage Regulator disabled
2. Internal voltage regulator enabled
P
For R
respectively
I
additionally contains the current flowing into the external loads with output high.
P
=
DDR
=
=
IO
IO
=
Junction Temperature, [ C
Ambient Temperature, [ C
=
Total Chip Power Dissipation, [W]
is the sum of all output currents on I/O ports associated with VDDX and VDDR.
is the sum of all output currents on I/O ports associated with VDDX and VDDR.
Package Thermal Resistance, [ C/W]
is the current shown in Table A-7 and not the overall current flowing into VDDR, which
DSON
Chip Internal Power Dissipation, [W]
is valid:
P INT
R DSON
=
I DD V DD
P INT
R DSON
=
P IO
P IO
=
V DD5 V OH
----------------------------------- - for outputs driven high
T J
I DDR V DDR
=
P D
+
=
=
=
I OH
V OL
----------- - for outputs driven low
I DDPLL V DDPLL
I OL
T A
=
i
i
P INT
;
R DSON
R DSON
+
P D
;
+
+
P IO
I DDA V DDA
JA
I IO
I IO
i
i
2
2
+
I DDA
V DDA

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