MC9S12DP512CPVE Freescale, MC9S12DP512CPVE Datasheet - Page 116

• Manufacturer Part Number: MC9S12DP512CPVE
• Manufacturer: Freescale

Specifications of MC9S12DP512CPVE

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 14KB
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.25V
• Operating Supply Voltage (min): 2.35/4.5V
• On-chip Adc: 2(8-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

MC9S12DP512 Device Guide V01.25
In Table A-20 the timing characteristics for slave mode are listed.
NOTES:
Num
1. t
(CPOL 0)
(CPOL 1)
(OUTPUT)
10
11
12
13
1
1
2
3
4
5
6
7
8
9
(INPUT)
NOTE: Not defined!
bus
(INPUT)
(INPUT)
(INPUT)
MISO
MOSI
SCK
SCK
added due to internal synchronization delay
SS
SCK Frequency
SCK Period
Enable Lead Time
Enable Lag Time
Clock (SCK) High or Low Time
Data Setup Time (Inputs)
Data Hold Time (Inputs)
Slave Access Time (time to data active)
Slave MISO Disable Time
Data Valid after SCK Edge
Data Valid after SS fall
Data Hold Time (Outputs)
Rise and Fall Time Inputs
Rise and Fall Time Outputs
note
see
7
Characteristic
Table A-20 SPI Slave Mode Timing Characteristics
2
SLAVE
4
5
9
MSB IN
Figure A-9 SPI Slave Timing (CPHA=1)
1
MSB OUT
6
4
12
12
11
BIT 6 . . . 1
BIT 6 . . . 1
Symbol
t
t
t
f
t
wsck
t
t
lead
t
vsck
t
t
t
t
sck
sck
t
vss
lag
t
dis
su
ho
rfo
hi
rfi
a
Min
DC
20
—
—
—
—
—
—
4
4
4
4
8
8
13
13
SLAVE LSB OUT
3
LSB IN
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
30 + t
30 + t
Max
8
1 4
20
22
—
—
—
—
—
—
8
8
bus
bus
1
1
Unit
f
t
t
t
t
bus
bus
bus
bus
bus
ns
ns
ns
ns
ns
ns
ns
ns
ns