MC9S12DP512CPVE Freescale, MC9S12DP512CPVE Datasheet - Page 97

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MC9S12DP512CPVE

Manufacturer Part Number
MC9S12DP512CPVE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12DP512CPVE

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
14KB
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.25V
Operating Supply Voltage (min)
2.35/4.5V
On-chip Adc
2(8-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Conditions are shown in Table A-4 unless otherwise noted
V
f
A.2.3 ATD accuracy
Table A-10 specifies the ATD conversion performance excluding any errors due to current injection,
input capacitance and source resistance.
Num C
For the following definitions see also Figure A-1.
Differential Non-Linearity (DNL) is defined as the difference between two adjacent switching steps.
The Integral Non-Linearity (INL) is defined as the sum of all DNLs:
ATDCLK
NOTES:
1. These values include the quantization error which is inherently 1/2 count for any A/D converter.
REF
1
2
3
4
5
6
7
8
= V
P 10-Bit Resolution
P 10-Bit Differential Nonlinearity
P 10-Bit Integral Nonlinearity
P 10-Bit Absolute Error
P 8-Bit Resolution
P 8-Bit Differential Nonlinearity
P 8-Bit Integral Nonlinearity
P 8-Bit Absolute Error
= 2.0MHz
RH
- V
RL
= 5.12V. Resulting to one 8 bit count = 20mV and one 10 bit count = 5mV
(1)
1
Rating
Table A-10 ATD Conversion Performance
INL n
DNL i
=
i
=
n
1
DNL i
=
V
----------------------- - 1
i
1LSB
Symbol
DNL
DNL
LSB
LSB
V
INL
INL
AE
AE
=
i 1
V
------------------- - n
1LSB
n
Min
–2.5
–0.5
–1.0
-1.5
V
–1
-3
-
-
MC9S12DP512 Device Guide V01.25
0
Typ
20
1.5
2.0
0.5
1.0
5
-
-
Max
2.5
0.5
1.0
1.5
1
3
-
-
Counts
Counts
Counts
Counts
Counts
Counts
Unit
mV
mV
97

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