MC9S12DP512CPVE Freescale, MC9S12DP512CPVE Datasheet - Page 113
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MC9S12DP512CPVE
Manufacturer Part Number
MC9S12DP512CPVE
Description
Manufacturer
Freescale
Datasheet
1.MC9S12DP512CPVE.pdf
(124 pages)
Specifications of MC9S12DP512CPVE
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
14KB
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.25V
Operating Supply Voltage (min)
2.35/4.5V
On-chip Adc
2(8-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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A.7 SPI
This section provides electrical parametrics and ratings for the SPI.
In Table A-18 the measurement conditions are listed.
A.7.1 Master Mode
In Figure A-6 the timing diagram for master mode with transmission format CPHA=0 is depicted.
In Figure A-7 the timing diagram for master mode with transmission format CPHA=1 is depicted.
Drive mode
Load capacitance C
on all outputs
Thresholds for delay
measurement points
(CPOL 1)
(CPOL 0)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
1.if configured as an output.
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
(INPUT)
MISO
MOSI
SCK
SCK
SS
1
Description
LOAD,
2
5
10
MSB IN
MSB OUT
Figure A-6 SPI Master Timing (CPHA=0)
Table A-18 Measurement Conditions
2
6
4
2
1
4
BIT 6 . . . 1
BIT 6 . . . 1
9
(20% / 80%) VDDX
full drive mode
Value
12
12
50
LSB IN
LSB OUT
MC9S12DP512 Device Guide V01.25
13
13
11
Unit
3
pF
—
V
113