WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 34

• Manufacturer Part Number: WG82574L S LBA8
• Manufacturer: Intel

Specifications of WG82574L S LBA8

• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

Table 20.
3.1.4.2
3.1.4.3
3.1.4.4
34
Allocation of FC Credits
Rules for FC updates:
Upstream Flow Control Tracking
The 82574 issues a master transaction only when the required FC credits are available.
Credits are tracked for posted, non-posted, and completions (the later to operate
against a switch).
Flow Control Update Frequency
In any case, UpdateFC packets are scheduled immediately after a resource becomes
available.
When the link is in the L0 or L0s link state, update FCPs for each enabled type of non-
infinite FC credit must be scheduled for transmission at least once every 30 µs (-0%/
+50%), except when the Extended Sync bit of the Control Link register is set, in which
case the limit is 120 µs (-0%/+50%).
Flow Control Timeout Mechanism
The 82574 implements the optional FC update timeout mechanism. The mechanism is
activated when the link is in L0 or L0s link state. It uses a timer with a limit of 200 µs (-
0%/+50%), where the timer is reset by the receipt of any init or update FCP.
Alternately, the timer can be reset by the receipt of any DLLP.
After timer expiration, the mechanism instructs the PHY to retrain the link (via the
LTSSM recovery state).
Posted Request Header (PH)
Posted Request Data (PD)
Non-Posted Request Header (NPH)
Non-Posted Request Data (NPD)
Completion Header (CPLH)
Completion Data (CPLD)
• The 82574 maintains two credits for NPD at any given time. It increments the
• The 82574 provides two credits for PH (such as for two concurrent target writes)
• The 82574 follows the PCIe recommendations for frequency of UpdateFC FCPs.
credit by one after the credit is consumed and sends an UpdateFC packet as soon
as possible. UpdateFC packets are scheduled immediately after a resource is
available.
and two credits for NPH (such as for two concurrent target reads). UpdateFC
packets are scheduled immediately after a resource becomes available.
Credit Type
Target write (1 unit)
Message (1 unit)
Target write (Length/16B=1)
Message (1 unit)
Target read (1 unit)
Configuration read (1 unit)
Configuration write (1 unit)
Configuration write (1 unit)
Read completion (N/A)
Read completion (N/A)
Operations
82574 GbE Controller—Interconnects
2 units
16 credits (for 256 bytes)
2 units
2 units
Infinite (accepted immediately)
Infinite (accepted immediately)
Number Of Credits