WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 365

• Manufacturer Part Number: WG82574L S LBA8
• Manufacturer: Intel

Specifications of WG82574L S LBA8

• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

Driver Programing Interface—82574 GbE Controller
Note:
10.2.8.16
Note:
Note:
10.2.8.17
All reserved fields read as 0b’s and ignore writes. Bits 10:8 must be written as 0b.
Before writing to the flexible filter length table, the software device driver must first
disable the flexible filters by writing 0b’s to the Flexible Filter Enable bits of the Wake
Up Filter Control (WUFC.FLXn) register.
Flexible Filter Mask Table - FFMT (0x09000–0x093F8; RW)
The Flexible Filter Mask Table register is used to store the four 1-bit masks for each of
the first 128 data bytes in a packet, one for each flexible filter. If the mask bit is 1b, the
corresponding flexible filter compares the incoming data byte at the index of the mask
bit to the data byte stored in the flexible filter value table.
The table is organized to permit expansion to eight (or more) filters and 256 bytes in a
future product without changing the address map.
Before writing to the flexible filter mask table, the software device driver must first
disable the flexible filters by writing 0b’s to the Flexible Filter Enable bits of the Wake
Up Filter Control (WUFC.FLXn) register.
Flexible TCO Filter Table - FTFT (0x09400–0x097F8; RW)
These registers can be used by software to update the flex-TCO filter bytes that should
be compared. As opposed to the wake-up table this structure contains the byte value
and the bit mask in the same address.
Bits 7:0 and 8 are used for flex TCO filter 0 and bits 16:9 and 17 are used for flex TCO
filter 1.
The TCO flexible filters are enabled for manageability filtering if:
The TCO flexible filters are enabled for wakeup if FTFA0/1 and FTF0/1_EN bits are set in
the WUC register.
MASK0
MASK1
MASK2
...
MASK127
• Bits 28,29 are set in any of manageability decision filters (MDEF). Bit 28 enables
• Bits FTFA0/1 in the WUC register are cleared (0).
flex TCO0 filter, Bit 29 enables flex TCO1 filter.
Field
0
2
4
254
Dword #
0x9000
0x9008
0x9010
0x93F8
Address
3:0
3:0
3:0
3:0
Bit(s)
X
X
X
X
Initial Value
Mask for Filter [3:0] for Byte 0
Mask for Filter [3:0] for Byte 1
Mask for Filter [3:0] for Byte 2
Mask for Filter [3:0] for Byte 127
Description
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