WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 49

• Manufacturer Part Number: WG82574L S LBA8
• Manufacturer: Intel

Specifications of WG82574L S LBA8

• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

Interconnects—82574 GbE Controller
Figure 6.
Note:
802.3x MAC Control Frame Format
Where S is the start-of-packet delimiter and T is the first part of the end-of-packet
delimiters for 802.3z encapsulation.
The receiver is enabled to receive flow control frames if flow control is enabled via the
RFCE bit in the Device Control (CTRL) register.
Flow control capability must be negotiated between link partners via the auto-
negotiation process. The auto-negotiation process might modify the value of these bits
based on the resolved capability between the local device and the link partner.
Once the receiver validates receiving an XOFF or pause frame, the 82574 performs the
following:
Resuming transmission can occur under the following conditions:
Either condition clears the TXOFF status bit in the Device Status register and
transmission can resume. Note that hardware records the number of received XON
frames.
• Increments the appropriate statistics register(s).
• Sets the TXOFF bit in the Device Status (STATUS) register.
• Initializes the pause timer based on the packet's Pause Timer field.
• Disables packet transmission or schedules the disabling of transmissions after the
• An expired pause timer
• Receiving an XON frame (a frame with its pause timer set to zero)
current packet completes.
(min_FrameSize -160)/8
Bytes
Up to 6 Bytes
6 Bytes
6 Bytes
2 Bytes
2 Bytes
4 Bytes
1 Byte
1 Byte
1 Byte
MAC Control
MAC Control
Type/Length
Preamble...
Destination
Parameters
Address
Address
Opcode
Source
SFD
FCS
T
S
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