ISP1362BDFA STEricsson, ISP1362BDFA Datasheet - Page 57

• Manufacturer Part Number: ISP1362BDFA
• Manufacturer: STEricsson

Specifications of ISP1362BDFA

• Lead Free Status / RoHS Status: Compliant

ISP1362_7
Product data sheet
12.4.3.2 Isochronous endpoints
12.5.1 Suspend conditions
12.5 ISP1362 peripheral controller suspend and resume
Table 20.
[1]
A DMA transfer to or from an isochronous endpoint can be terminated by any of the
following conditions (bit names refer to the DcDMAConfiguration register, see
and
Table 21.
The peripheral controller in the ISP1362 detects a USB suspend condition in either of the
following cases:
Bus-powered devices that are suspended must not consume more than 500 μA of
current. This is achieved by shutting down the power to system components or supplying
them with a reduced voltage.
The steps leading the peripheral controller to the suspend state are as follows:
EOT condition
DcDMACounter register
Short packet
DMAEN bit of the
DcDMAConfiguration register
EOT condition
DcDMACounter register zero
1. In the event of no SOF for 3 ms, the peripheral controller in the ISP1362 sets
2. When the firmware detects a suspend condition (through IESUSP), it must prepare all
•
•
•
•
•
The DMA transfer stops. No interrupt, however, is generated.
The DMA transfer completes as programmed in the DcDMACounter register
(CNTREN = 1).
An End-Of-Packet (EOP) signal is detected.
DMA operation is disabled by clearing bit DMAEN.
Constant idle state is present on the USB bus for 3 ms.
V
bit SUSPND of the DcInterrupt register. This will generate an interrupt if bit IESUSP of
the DcInterruptEnable register is set.
system components for the suspend state:
a. All the signals connected to the peripheral controller in the ISP1362 must enter
Table
BUS
appropriate states to meet the power consumption requirements of the suspend
state.
is lost.
121):
Summary of EOT conditions for a bulk endpoint
Recommended EOT usage for isochronous endpoints
Rev. 07 — 29 September 2009
OUT endpoint
transfer completes as
programmed in the
DcDMACounter register
short packet is received and
transferred
DMAEN = 0
OUT endpoint
do not use
[1]
Single-chip USB OTG controller
IN endpoint
transfer completes as
programmed in the
DcDMACounter register
counter reaches zero in the
middle of the buffer
DMAEN = 0
IN endpoint
preferred
© ST-ERICSSON 2009. All rights reserved.
[1]
ISP1362
Table 120
57 of 147