ISP1362BDFA STEricsson, ISP1362BDFA Datasheet - Page 70

• Manufacturer Part Number: ISP1362BDFA
• Manufacturer: STEricsson

Specifications of ISP1362BDFA

• Lead Free Status / RoHS Status: Compliant

ISP1362_7
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
R/W
23
15
7
0
-
-
-
-
HCFS[1:0]
Table 39.
Bit
31 to 11
10
9
8
7 to 6
5 to 0
R/W
22
14
6
0
-
-
-
-
HcControl register: bit description
Symbol
-
RWE
RWC
-
HCFS[1:0]
-
reserved
21
13
5
-
-
-
-
-
-
Rev. 07 — 29 September 2009
Description
reserved
RemoteWakeupEnable: This bit is used by the HCD to enable or
disable the remote wake-up feature on detecting upstream resume
signaling. When this bit and the ResumeDetected (RD) bit in
HcInterruptStatus are set, a remote wake-up is signaled to the host
system. Setting this bit has no impact on the generation of the
hardware interrupt.
RemoteWakeupConnected: This bit indicates whether the host
controller supports remote wake-up signaling. If remote wake-up is
supported and used by the system, it is the responsibility of the system
firmware to set this bit during POST. The host controller clears the bit
on a hardware reset but does not alter it on a software reset. Remote
wake-up signaling of the host system is host-bus-specific and is not
described in this specification.
reserved
HostControllerFunctionalState for USB
00 — USBReset
01 — USBResume
10 — USBOperational
11 — USBSuspend
A transition to USBOperational from another state causes
Start-Of-Frame (SOF) generation to begin 1 ms later. The HCD may
determine whether the host controller has begun sending SOFs by
reading the StartofFrame (SF) field of HcInterruptStatus.
This field may be changed by the host controller only when it is in the
USBSuspend state. The host controller may move from the
USBSuspend state to the USBResume state after detecting the
resume signaling from a downstream port.
The host controller enters USBReset either by a software reset or by a
hardware reset. The latter also resets the root hub and asserts
subsequent reset signaling to downstream ports.
reserved
20
12
4
-
-
-
-
-
-
reserved
19
11
3
-
-
-
-
-
-
reserved
Single-chip USB OTG controller
RWE
R/W
18
10
0
2
-
-
-
-
© ST-ERICSSON 2009. All rights reserved.
RWC
R/W
17
9
0
1
-
-
-
-
ISP1362
reserved
70 of 147
16
8
0
-
-
-
-
-
-