AD9511BCPZ Analog Devices Inc, AD9511BCPZ Datasheet - Page 48

• Manufacturer Part Number: AD9511BCPZ
• Description: IC CLOCK DIST 5OUT PLL 48LFCSP
• Manufacturer: Analog Devices Inc
• Type: Fanout Buffer (Distribution), Divider, PLLr

Specifications of AD9511BCPZ

• Number Of Circuits: 1
• Ratio - Input:output: 2:5
• Differential - Input:output: Yes/Yes
• Input: Clock
• Output: CMOS, LVDS, LVPECL
• Frequency - Max: 1.2GHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Frequency-max: 1.2GHz
• Clock Ic Type: Clock Distribution
• Ic Interface Type: Serial
• Frequency: 1.2GHz
• No. Of Outputs: 5
• No. Of Multipliers / Dividers: 5
• Supply Voltage Range: 3.135V To 3.465V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9511/PCB - BOARD EVAL CLOCK DISTR 48LFCSPAD9511-VCO/PCB - BOARD EVAL CLOCK DISTR 48LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9511
Reg.
Addr.
(Hex)
08
08
08
09
09
09
09
09
09
Bit(s) Name
<5:2> PLL Mux Control
<6>
<7>
<0>
<1>
<2>
<3>
<6:4> Charge Pump (CP)
<7>
Phase-Frequency
Detector (PFD)
Polarity
Reset All Counters 0 = Normal (Default), 1 = Reset R, A, and B Counters.
N-Counter Reset
R-Counter Reset
Current Setting
Description
<5>
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
MUXOUT is the PLL portion of the STATUS output MUX.
0 = Negative (Default), 1 = Positive.
Not Used.
0 = Normal (Default), 1 = Reset A and B Counters.
0 = Normal (Default), 1 = Reset R Counter.
Not Used.
<6>
0
0
0
0
1
1
1
1
Default = 000b.
These currents assume: CPR
Actual current can be calculated by: CP_lsb = 3.06/CPR
Not Used.
<4>
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Rev. A | Page 48 of 60
SET
<3>
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
= 5.1 kΩ.
<2>
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
<5>
0
0
1
1
0
0
1
1
MUXOUT—Signal on STATUS Pin
Off (Signal Goes Low) (Default)
Digital Lock Detect (Active High)
N Divider Output
Digital Lock Detect (Active Low)
R Divider Output
Analog Lock Detect (N Channel, Open-Drain)
A Counter Output
Prescaler Output (NCLK)
PFD Up Pulse
PFD Down Pulse
Loss-of-Reference (Active High)
Tri-State
Analog Lock Detect (P Channel, Open-Drain)
Loss-of-Reference or Loss-of-Lock (Inverse of DLD)
(Active High)
Loss-of-Reference or Loss-of-Lock (Inverse of DLD)
(Active Low)
Loss-of-Reference (Active Low)
<4>
0
1
0
1
0
1
0
1
SET
.
I
0.60
1.2
1.8
2.4
3.0
3.6
4.2
4.8
CP
(mA)