ICS1523M IDT, Integrated Device Technology Inc, ICS1523M Datasheet - Page 12

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ICS1523M

Manufacturer Part Number
ICS1523M
Description
IC VIDEO CLK SYNTHESIZER 24-SOIC
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock/Frequency Synthesizer (IF), Fanout Distribution, Frequency Generatorr
Datasheet

Specifications of ICS1523M

Pll
Yes
Input
Clock
Output
LVPECL, SSTL-3
Number Of Circuits
1
Ratio - Input:output
1:3
Differential - Input:output
No/Yes
Frequency - Max
250MHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Frequency-max
250MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
1523M

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MDS ICS1523 ZC
Section 11 Programming
11.1 Industry-Standard I
Note:
Write Procedure for Single Re gis ter
Re ad Proce dure for Single Re gis te r
Write Procedure for M ultiple Regis te rs (Note 1)
Re ad Proce dure for M ultiple Re gis te rs (Note 1)
All values are sent with the most-significant bit (MSB) first and least-significant bit (LSB) last.
W
Legend
A
A
S 0 1 0 0 1 1 X 0 A
S 0 1 0 0 1 1 X 0 A
S 0 1 0 0 1 1 X 0 A
S 0 1 0 0 1 1 X 0 A
R
S
X
MSB
MSB
MSB
MSB
= Write = 0
= Start (SDA goes low when SCL was high, then SCL goes low too)
= ACK = Acknowledge = 0
= ACK = No Acknowledge = 1
= Bit value that equals logic state of SBADR pin.
Bus Master drives signal to ICS1523
Device address
Device address
Device address
Device address
= Read = 1
= (Dashed Line) Multiple transactions
Figure 11-1 ICS1523 Data Format for I
1 - Lower nibble of the I
or read from the ICS1523.
2 - Upper nibble of the I
re-address the ICS1523. The software:
– Must NOT just index 0 and then do all the I/O as one-byte transactions.
– Must break the transactions into at least two separate bus transactions:
(1) 00 to 08 (2) 10 to 12
LSB
LSB
LSB
LSB
Integrated Device Technology, Inc.
Register Index
Register Index
Register Index
Register Index
2
2
C Serial Bus: Data Format
2
C register automatically increments after each successive data byte is written to
C register does not automatically increment, and the software must explicitly
A
A S 0 1 0 0 1 1 X 1 A
A
A S 0 1 0 0 1 1 X 1 A
ICS1523 (Slave Device) drives signal to Bus Master
MSB
Repeat START
MSB
Repeat START
Device address
Device address
Data
Data
2

C 2-Wire Serial Bus
12
Tech Support: www.idt.com/go/clockhelp
Video Clock Synthesizer with I
LSB
LSB
A
A
Stop
Data
Data
Data
A
A
A
NO Acknow ledge
Stop
2
C Programmable Delay
NO Acknow ledge
Data
Revision 020811
ICS1523
A
A
Stop
Stop

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