LU82551ER 860613 Intel, LU82551ER 860613 Datasheet - Page 19

• Manufacturer Part Number: LU82551ER 860613
• Manufacturer: Intel

Specifications of LU82551ER 860613

• Lead Free Status / Rohs Status: Supplier Unconfirmed

4.4
Datasheet
Table 6.
Table 7.
Note: These test port signals are not JTAG compatible. As a result, a BSDL file is not required.
Local Memory Interface Signals
Test Port Signals
Test Port Signals
FLA6:2
FLA1/
AUXPWR
FLA0/
PCIMODE#
EECS
FLCS#
FLOE#
FLWE#
TEST
TCK
TI
TEXEC
TO
Symbol
Symbol
OUT
TS
TS
OUT
OUT
OUT
OUT
IN
IN
IN
IN
OUT
Type
Type
Flash Address[6:2]. These pins are used as Flash address outputs.
These pins should be left floating if the Flash is not used.
Flash Address1/Auxiliary Power. This multiplexed pin acts as the
Flash Address 1 output signal during nominal operation. When the
power-on reset of the 82551ER is active (low), it acts as the power
supply indicator. If the 82551ER is fed by auxiliary power, it should be
connected to VCC through a pull-up resistor (3.3 K). Otherwise, this
pin should be left floating.
Flash Address 0/PCI Mode. This multiplexed pin acts as the Flash
Address 0 output signal during nominal operation. When power-on
reset of the 82551ER is active (low), it acts as the input system type.
For PCI systems that do not use Flash, this pin should be left floating.
EEPROM Chip Select. The EEPROM Chip Select signal is used to
assert chip select to the serial EEPROM.
Flash Chip Select. The Flash Chip Select pin provides an active low
Flash chip select signal. This pin should be left floating if Flash is not
used.
Flash Output Enable. This pin provides an active low output enable
control (read) to the Flash memory. This pin should be left floating if
Flash is not used.
Flash Write Enable. This pin provides an active low write enable
control to the Flash memory. This pin should be left floating if Flash is
not used.
Test Port. If this input pin is high, the 82551ER will enable the test
port. During nominal operation this pin should be connected to a 1K 
pull-down resistor.
Test Port Clock. This pin is used for the Test Port Clock signal.
Test Port Data Input. This pin is used for the Test Port Data Input
signal.
Test Port Execute Enable. This pin is used for the Test Port Execute
Enable signal.
Test Port Data Output. This pin is used for the Test Port Data Output
signal.
Name and Function
Name and Function
Networking Silicon — 82551ER
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