LU82551ER 860613 Intel, LU82551ER 860613 Datasheet - Page 29
LU82551ER 860613
Manufacturer Part Number
LU82551ER 860613
Description
Manufacturer
Intel
Datasheet
1.LU82551ER_860613.pdf
(104 pages)
Specifications of LU82551ER 860613
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Figure 6. PCI Retry Cycle
Note: The 82551ER is considered the target in the above diagram; thus, TRDY# is not asserted.
5.2.1.1.3 Retry Premature Accesses
The 82551ER responds with a Retry to any configuration cycle accessing the 82551ER before the
completion of the automatic read of the EEPROM. The 82551ER may continue to Retry any
configuration accesses until the EEPROM read is complete. The 82551ER does not enforce the
rule that the retry master must attempt to access the same address again to complete any delayed
transaction. Any master access to the 82551ER after the completion of the EEPROM read will be
honored.
5.2.1.1.4 Error Handling
Data Parity Errors: The 82551ER checks for data parity errors while it is the target of the
transaction. If an error was detected, the 82551ER always sets the Detected Parity Error bit in the
PCI Configuration Status register, bit 15. The 82551ER also asserts PERR#, if the Parity Error
Response bit is set (PCI Configuration Command register, bit 6). The 82551ER does not attempt to
terminate a cycle in which a parity error was detected. This gives the initiator the option of
recovery.
Target-Disconnect: The 82551ER prematurely terminates a cycle in the following cases:
System Error: The 82551ER reports parity error during the address phase using the SERR# pin. If
the SERR# Enable bit in the PCI Configuration Command register or the Parity Error Response bit
is not set, the 82551ER only sets the Detected Parity Error bit (PCI Configuration Status register,
bit 15). If SERR# Enable and Parity Error Response bits are both set, the 82551ER sets the
Signaled System Error bit (PCI Configuration Status register, bit 14) as well as the Detected Parity
Error bit and asserts SERR# for one clock.
•
•
•
After accesses to the Flash buffer
After accesses to its CSR
After accesses to the configuration space
Figure 6
CLK
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
below shows how a Retry looks when it occurs.
Networking Silicon — 82551ER
21
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