EP3C55F484C8N Altera, EP3C55F484C8N Datasheet - Page 52
![IC CYCLONE III FPGA 55K 484FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP3C55F484C8N
Manufacturer Part Number
EP3C55F484C8N
Description
IC CYCLONE III FPGA 55K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10M164C8N.pdf
(350 pages)
7.EP3C55F484C8N.pdf
(274 pages)
Specifications of EP3C55F484C8N
Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2396160
Number Of I /o
327
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
55856
# I/os (max)
327
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
55856
Ram Bits
2396160
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
3491
Family Type
Cyclone III
No. Of I/o's
327
I/o Supply Voltage
3.3V
Operating Frequency Max
402MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2510
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C55F484C8N
Manufacturer:
ALTERA
Quantity:
490
Part Number:
EP3C55F484C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
2–8
Cyclone III Device Handbook, Volume 2
Table 2–9. Cyclone III LS Devices Pin Capacitance (Part 2 of 2)
C
C
C
C
Note to
(1) When you use the VREF pin as a regular input or output, you can expect a reduced performance of toggle rate and
Symbol
V REFLR
V REFTB
C LKTB
C LKLR
t
C O
(1)
(1)
due to higher pin capacitance.
Table
Input capacitance on left/right dual-purpose VREF pin
when used as V
Input capacitance on top/bottom dual-purpose VREF
pin when used as V
Input capacitance on top/bottom dedicated clock input
pins
Input capacitance on left/right dedicated clock input
pins
2–9:
REF
or user I/O pin
REF
Parameter
or user I/O pin
Chapter 2: Cyclone III LS Device Data Sheet
© December 2009 Altera Corporation
Typical –
QFP
21
23
7
6
Electrical Characteristics
Typical –
FBGA
21
23
6
5
Unit
pF
pF
pF
pF