EP4CE55F23I8L Altera, EP4CE55F23I8L Datasheet - Page 460
EP4CE55F23I8L
Manufacturer Part Number
EP4CE55F23I8L
Description
IC CYCLONE IV FPGA 55K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CE55F23I8L
Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2340000
Number Of I /o
324
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4CE55F23I8LN
Manufacturer:
ALTERA
Quantity:
239
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1–26
Cyclone IV Device Handbook, Volume 3
Configuration and JTAG Specifications
Table 1–28
Table 1–28. Passive Configuration Mode Specifications for Cyclone IV Devices
Table 1–29
Table 1–29. Active Configuration Mode Specifications for Cyclone IV Devices —Preliminary
Table 1–30
Table 1–30. JTAG Timing Parameters for Cyclone IV Devices
Passive Serial (PS)
Fast Passive Parallel
(FPP)
Notes to
(1) For more information about PS and FPP configuration timing parameters, refer to the
(2) FPP configuration mode supports all Cyclone IV E devices (except for E144 package devices) and EP4CGX50,
(3) V
(4) Cyclone IV E devices support 1.2 V V
Active Parallel (AP)
Active Serial (AS)
Note to
(1) AP configuration mode is only supported for Cyclone IV E devices.
t
t
t
t
t
t
t
t
t
t
t
t
t
JCP
JCH
JCL
JPSU_TDI
JPSU_TMS
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
Symbol
Programming Mode
System Upgrades in Cyclone IV Devices
EP4CGX75, EP4CGX110, and EP4CGX150 only.
for EP4CE6, EP4CE10, EP4CE15, EP4CE22, EP4CE30, and EP4CE40 only.
CCINT
(2)
Table
Programming Mode
Table
= 1.0 V is only supported for Cyclone IV E 1.0 V core voltage devices.
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time for TDI
JTAG port setup time for TMS
JTAG port hold time
JTAG port clock to output (2),
JTAG port high impedance to valid output (2),
JTAG port valid output to high impedance (2),
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
lists the configuration mode specifications for Cyclone IV devices.
lists the active configuration mode specifications for Cyclone IV devices.
lists the JTAG timing parameters and values for Cyclone IV devices.
1–29:
1–28:
(1)
V
CCINT
Voltage Level (V)
CCINT
1.0
1.0
1.2
Parameter
1.2
chapter.
. Cyclone IV E 1.2 V core voltage devices support 133 MHz DCLK f
(3)
(3)
(4)
(3)
DCLK Range
20 to 40
20 to 40
(3)
(3)
DCLK f
(Note 1)
133
100
66
66
Chapter 1: Cyclone IV Device Datasheet
© December 2010 Altera Corporation
MAX
(Part 1 of 2)—Preliminary
Configuration and Remote
Min
19
10
—
—
—
—
40
19
10
—
1
3
5
Switching Characteristics
(Note 1)
Unit
MHz
MHz
Max
—
—
—
—
—
—
15
15
15
—
—
25
25
MHz
MHz
MHz
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX
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