XC4VFX60-10FFG1152I Xilinx Inc, XC4VFX60-10FFG1152I Datasheet - Page 242

• Manufacturer Part Number: XC4VFX60-10FFG1152I
• Description: IC FPGA VIRTEX-4 FX 60K 1152FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX60-10FFG1152I

• Number Of Logic Elements/cells: 56880
• Number Of Labs/clbs: 6320
• Total Ram Bits: 4276224
• Number Of I /o: 576
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1152-BBGA, FCBGA
• For Use With: HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 6: SelectIO Resources
242
1.
2.
3.
4.
5.
6.
7.
8.
V
IOSTANDARDs in that bank.
Correct DCI I/O buffers must be used in the software either by using IOSTANDARD
attributes or instantiations in the HDL code.
Some DCI standards require that external reference resistors be connected to
multipurpose pins VRP and VRN in the bank. Where this is required, these two
multipurpose pins cannot be used as regular user I/Os. Refer to the Virtex-4 FPGA
pinouts for the specific pin locations. Pin VRN must be pulled up to V
reference resistor. Pin VRP must be pulled down to ground by its reference resistor.
However, some DCI standards do not require external reference resistors on the
VRP/VRN pins. If these are the only DCI-based I/O standards in a bank, the VRP and
VRN pins in that bank can be used as general-purpose I/Os.
♦
♦
The value of the external reference resistors should be selected to give the desired
output impedance. If using GTL_DCI, HSTL_DCI, or SSTL_DCI I/O standards, then
the external reference resistors should be 50Ω.
The values of the reference resistors must be within the supported range (20Ω – 100Ω).
Follow the DCI I/O banking rules:
a.
b. V
c.
d. No more than one DCI I/O standard using split termination type is allowed per
e.
The following packages to not support DCI in Banks 1 and 2: SF363, FF668, FF676,
FF672, and FF1152.
In addition, the following devices do not support DCI in Banks 1 and 2: XC4VLX15,
XC4VLX25, XC4VSX25, XC4VSX35, XC4VFX12, XC4VFX20, XC4VFX40, and
XC4VFX60.
CCO
The following DCI outputs do not require reference resistors on VRP/VRN:
HSTL_I_DCI
HSTL_III_DCI
HSTL_I_DCI_18
HSTL_III_DCI_18
SSTL2_I_DCI
SSTL18_I_DCI
The following inputs do not require reference resistors on VRP/VRN:
LVDCI_15
LVDCI_18
LVDCI_25
LVDCI_33
LVDCI_DV2_15
LVDCI_DV2_18
LVDCI_DV2_25
LVDCI_DV2_33
V
No more than one DCI I/O standard using single termination type is allowed per
bank.
bank.
Single termination and split termination, controlled impedance driver, and
controlled impedance driver with half impedance can co-exist in the same bank.
REF
CCO
pins must be connected to the appropriate V
must be compatible for all of the inputs in the same bank.
must be compatible for all of the inputs and outputs in the same bank.
www.xilinx.com
CCO
voltage based on the
UG070 (v2.6) December 1, 2008
Virtex-4 FPGA User Guide
CCO
by its
R