XC4VFX60-10FFG1152I Xilinx Inc, XC4VFX60-10FFG1152I Datasheet - Page 262

• Manufacturer Part Number: XC4VFX60-10FFG1152I
• Description: IC FPGA VIRTEX-4 FX 60K 1152FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX60-10FFG1152I

• Number Of Logic Elements/cells: 56880
• Number Of Labs/clbs: 6320
• Total Ram Bits: 4276224
• Number Of I /o: 576
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1152-BBGA, FCBGA
• For Use With: HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 6: SelectIO Resources
262
GTLP (Gunning Transceiver Logic Plus)
GTLP_DCI Usage
Table 6-10: GTL DC Voltage Specifications (Continued)
Table 6-11
Table 6-11: Allowed Attributes of the GTL I/O Standards
The Gunning Transceiver Logic Plus or GTL+ standard is a high-speed bus standard
(JESD8.3) first used by the Pentium Pro Processor. This standard requires a differential
amplifier input buffer and a open-drain output buffer. The negative terminal of the
differential input buffer is referenced to the V
A sample circuit illustrating a valid termination technique for GTL+ with external parallel
termination and unconnected V
GTL+ does not require a V
to 1.5V. GTLP_DCI provides single termination to V
A sample circuit illustrating a valid termination technique for GTLP_DCI with internal
parallel driver and receiver termination is shown in
Notes:
1. N must be greater than or equal to 0.653 and less than or equal to 0.68.
I
IOSTANDARD
CAPACITANCE
V
OL
CCO
Figure 6-37: GTL+ with External Parallel Termination and Unconnected V
at V
Figure 6-38: GTLP_DCI Internal Parallel Driver and Receiver Termination
= Unconnected
Attributes
OL
details the allowed attributes that can also be applied to the GTL I/O standards.
Parameter
(mA) at 0.2V
50Ω
V
CCO
IOB
= 1.5V
R
P
= Z 0 = 50Ω
www.xilinx.com
CCO
IOB
V
IBUF/IBUFG
voltage. However, for GTLP_DCI, V
TT
CCO
= 1.5V
is shown in
Z 0 = 50
Z 0 = 50
Min
-
LOW, NORMAL, DONT_CARE
V
REF
TT
GTL and GTL_DCI
Figure
= 1.5V
pin.
OBUF/OBUFT
R
P
CCO
Primitives
Figure
IOB
= Z 0 = 50Ω
V
REF
6-37.
for inputs or outputs.
Typ
V
–
CCO
6-38.
= 1.0V
UG070 (v2.6) December 1, 2008
= 1.5V
V
R VRP = Z 0 = 50Ω
IOB
Virtex-4 FPGA User Guide
REF
CCO
UG070_6_36_031308
= 1.0V
+
–
must be connected
Max
40
IOBUF
UG070_6_35_031308
+
–
CCO
R