XC2018-70PC84C Xilinx Inc, XC2018-70PC84C Datasheet - Page 7

• Manufacturer Part Number: XC2018-70PC84C
• Description: IC LOGIC CL ARRAY 1800GAT 84PLCC
• Manufacturer: Xilinx Inc
• Series: XC2000r

Specifications of XC2018-70PC84C

• Number Of Labs/clbs: 100
• Total Ram Bits: 17878
• Number Of I /o: 74
• Number Of Gates: 1500
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 84-LCC (J-Lead)
• Dc: 93+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Logic Elements/cells: -
• Other names: 122-1004

storage elements are reset by the active-Low chip RESET
pin as well as by the initialization phase preceding configu-
ration. If the storage element is not used, it is disabled.
The two block outputs, X and Y, can be driven by either the
combinatorial functions, F or G, or the storage element
output Q (Figure 4). Selection of the outputs is completely
interchangeable and may be made to optimize routing
efficiencies of the networks interconnecting the logic blocks
and I/O blocks.
Programmable Interconnect
Programmable interconnection resources in the Logic Cell
Array provide routing paths to connect inputs and outputs
of the I/O and logic blocks into desired networks. All
interconnections are composed of metal segments, with
programmable switching points provided to implement the
necessary routing. Three types of resources accommo-
date different types of networks.
• General purpose interconnect
• Longlines
• Direct connection
General-Purpose Interconnect
General-purpose interconnect, as shown in Figure 7a, is
composed of four horizontal metal segments between the
rows and five vertical metal segments between the col-
umns of logic and I/O blocks. Each segment is only the
height or width of a logic block. Where these segments
would cross at the intersections of rows and columns,
Figure 5. CLB Combinatorial Logic Options
Note: Variables D and Q can not be used in the same function.
A
B
C
D
Q
1 Function of 4
Option 1
Variables
Variables
Function
Any
of 4
F
G
B
A
C
D
A
B
C
D
Q
Q
2 Functions of 3
Option 2
Variables
Variables
Variables
Function
Function
2-191
Any
Any
of 3
of 3
switching matrices are provided to allow interconnections
of metal segments from the adjoining rows and columns.
Switches in the switch matrices and on block outputs are
specially designed transistors, each controlled by a con-
figuration bit.
Logic-block output switches provide contacts to adjacent
general interconnect segments and therefore to the switch-
ing matrix at each end of those segments. A switch matrix
Figure 6. CLB Storage Elememt
C
D
A
K
G
F
A
C
D
A
C
D
F
F
G
G
Q
Q
Dynamic Selection of
Variables
Variables
Function
Function
2 Functions of 3
Any
Any
of 3
of 3
Option 3
Variables
M
B
U
X
D
SET
RES
X5393
Q
G
F
X5400