XC5VLX50T-1FFG1136CES Xilinx Inc, XC5VLX50T-1FFG1136CES Datasheet - Page 244
![IC FPGA VIRTEX-5 ES 50K 1136FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX50T-1FFG1136CES
Manufacturer Part Number
XC5VLX50T-1FFG1136CES
Description
IC FPGA VIRTEX-5 ES 50K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50T-1FFG1136CES
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
2211840
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1136-BBGA, FCBGA
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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XC5VLX50T-1FFG1136CES
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Chapter 6: SelectIO Resources
244
LVDCI_DV2
A controlled impedance driver with half impedance (source termination) can also provide
drivers with one half of the impedance of the reference resistors. This allows reference
resistors to be twice as large, thus reducing static power consumption through VRN/VRP.
The I/O standards supporting a controlled impedance driver with half impedance are:
LVDCI_DV2_15, LVDCI_DV2_18, and LVDCI_DV2_25.
illustrate a controlled driver with half impedance unidirectional and bidirectional
termination.
To match the drive impedance to Z
reference resistor R must be twice Z
X-Ref Target - Figure 6-33
X-Ref Target - Figure 6-34
There are no drive strength settings for LVDCI drivers. When the driver impedance is one-
half of the VRN/VRP reference resistors, it is indicated by the addition of DV2 to the
attribute name.
Table 6-9
R 0 = ½R VRN = ½R VRP = Z 0
lists the LVCMOS, LVDCI, and LVDCI_DV2 voltage specifications.
R 0 = ½R VRN = ½R VRP = Z 0
Figure 6-33: Controlled Impedance Driver with Half Impedance
Figure 6-34: Controlled Impedance Driver with Half Impedance
LVDCI_DV2
LVDCI_DV2
www.xilinx.com
IOB
IOB
Unidirectional Termination
Bidirectional Termination
0
0
when using a driver with half impedance, the
.
Z 0
Z 0
IOB
IOB
Figure 6-33
R 0 = ½R VRN = ½R VRP = Z 0
LVDCI_DV2
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
and
ug190_6_30_022806
LVDCI_DV2
Figure 6-34
ug190_6_31_022806
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