XC5VLX50T-1FFG1136CES Xilinx Inc, XC5VLX50T-1FFG1136CES Datasheet - Page 354
![IC FPGA VIRTEX-5 ES 50K 1136FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX50T-1FFG1136CES
Manufacturer Part Number
XC5VLX50T-1FFG1136CES
Description
IC FPGA VIRTEX-5 ES 50K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50T-1FFG1136CES
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
2211840
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1136-BBGA, FCBGA
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX50T-1FFG1136CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
- XC5VLX30T-1FFG665C_PRODUCT_CHANGE PDF datasheet #4
- Current page: 354 of 385
- Download datasheet (14Mb)
Chapter 8: Advanced SelectIO Logic Resources
354
ISERDES Primitive (ISERDES_NODELAY)
•
Figure 8-1
components and features of the block.
X-Ref Target - Figure 8-1
The ISERDES primitive in Virtex-5 devices (shown in
X-Ref Target - Figure 8-2
Dedicated support for Networking interfaces.
CLKDIV
OCLK
Bitslip
CE1
CE2
CLK
RST
D
shows the block diagram of the ISERDES, highlighting all the major
BITSLIP
CE1
CE2
CLK
CLKDIV
D
OCLK
SHIFTIN1
SHIFTIN2
RST
CLKB
Figure 8-2: ISERDES_NODELAY Primitive
Figure 8-1: ISERDES Block Diagram
www.xilinx.com
Module
CE
ISERDES_NODELAY
Primitive
Serial to Parallel
Converter
Figure
BITSLIP
Module
8-2) is ISERDES_NODELAY.
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
ug190_8_02_112607
Q1
Q2
Q3
Q4
Q5
Q6
SHIFTOUT1
SHIFTOUT2
ug190_8_01_050906
SHIFTIN1/2
SHIFTOUT1/2
Q1 - Q6
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