MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 11

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Paragraph
MOTOROLA
Number
8.1.13
8.2.3
9.5.1.3
9.5.1.6
9.5.1.7
9.5,1,11
9.5.3
9.5.3.1
8.1.12
8.2
8.2.1
8.2.2
8.3
8.4
9.1
9.1.1
9.1.2
9:2
9.2.1
9.2.2
9.2.3
9.3
9.4
9.5
9.5.1
9.5.1.1
9.5,1.2
9.5.1.4
9.5.1.5
9.5.1.8
9.5.1.9
&5.1.10
9.5.1.12
9.5.2
9:5.3.2
Address T r a n s l a t i o n Cache ......................................................
T r a n s l a t i o n Table Details .........................................................
Coprocessor Considerations .....................................................
Exception Stack Frame Formats ...............................................
T r a n s l a t i o n Table Structure ......................................................
Address T r a n s l a t i o n ................................................................
T r a n s p a r e n t T r a n s l a t i o n ...........................................................
Bus Fault Recovery .................................................................
Special Status Word (SSW) .............. ..................................
C o m p l e t i n g the Bus Cycles w i t h RTE ..................................
T r a n s l a t i o n Control ...........................................................
T r a n s l a t i o n Table Descriptors .............................................
General Table Search .......................................................
Variations in Translation Table Structure ............................
M u l t i p l e Exceptions ...........................................................
Return f r o m Exception .......................................................
Using Software To Complete the Bus Cycles .......................
General Flow for Address T r a n s l a t i o n .................................
Effect of RESET on M M U ...................................................
Effect of M M U D I S on Address T r a n s l a t i o n ...........................
Descriptor Details .............................................................
TABLE OF CONTENTS (Continued)
S h o r t - F o r m a t Table Descriptor .....................................
Short-Format Early T e r m i n a t i o n Page Descriptor ............
S h o r t - F o r m a t Page Descriptor ......................................
Short-Format Invalid Descriptor ...................................
S h o r t - F o r m a t Indirect Descriptor
Early T e r m i n a t i o n and C o n t i g u o u s M e m o r y ..................
Indirection .................................................................
Descriptor Field Definitions ..........................................
Root Pointer Descriptor ...............................................
L o n g - F o r m a t Table Descriptor ......................................
Long-Format Early T e r m i n a t i o n Page Descriptor ............
L o n g - F o r m a t Page Descriptor .......................................
Long-Format Invalid Descriptor ...................................
Long-Format Indirect Descriptor ..................................
Memory Management Unit
MC68030 USER'S MANUAL
Section 9
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