MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 129

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MC68030RC20C

Manufacturer Part Number
MC68030RC20C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030RC20C

Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68030RC20C-1F91C
Manufacturer:
ON/安森美
Quantity:
20 000
5
5.2 FUNCTION CODE SIGNALS (FC0-FC2)
5.3 ADDRESS BUS (A0-A31)
5.4 DATA BUS (D0-D31)
5.5 TRANSFER SIZE SIGNALS (SIZ0, SIZ1)
5-4
These three-state outputs provide the address for the current bus cycle, ex-
These three-state bidirectional signals provide the general-purpose data path
These three-state outputs indicate the number of bytes remaining to be trans-
ferred for the current bus cycle. With A0, A1, DSACK0, DSACK1, and STERM,
to 7.2.1 Dynamic Bus Sizing for more information on the size signals and
their use in dynamic bus sizing.
These three-state outputs identify the address space of the current bus cycle.
Table 4-1 shows the relationship of the function code signals to the privilege
cept in the CPU address space. Refer to 4.2 ADDRESS SPACE TYPES for more
information on the CPU address space. A31 is the most significant address
signal, Refer to 7.1.2 Address Bus for information on the address bus and
its relationship to bus operation.
between the MC68030 and all other devices. The data bus can transfer 8, 16,
24, or 32 bits of data per bus cycle. D31 is the most significant bit of the data
bus. Refer to 7.1.4 Data Bus for more information on the data bus and its
SIZ0 and SIZ1 define the number of bits transferred on the data bus. Refer
levels and the address spaces. Refer to 4.2 ADDRESS SPACE TYPES for more
information.
relationship to bus operation.
MC68030 USER'S MANUAL
MOTOROLA

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