MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 119

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

able operation of the QUICC. If BERR remains asserted into the next bus cycle, it may cause
incorrect operation of that cycle. When BERR is issued to terminate a bus cycle, the QUICC
may enter exception processing immediately following the bus cycle, or it may defer pro-
cessing the exception.
The instruction prefetch mechanism requests instruction words from the bus controller be-
fore it is ready to execute them. If a bus error occurs on an instruction fetch, the QUICC does
not take the exception until it attempts to use that instruction word. Should an intervening
instruction cause a branch or should a task switch occur, the bus error exception does not
occur. The bus error condition is recognized during a bus cycle in any of the following cases:
When the QUICC recognizes a bus error condition, it terminates the current bus cycle in the
normal way. Figure 4-29 shows the timing of a bus error for the case in which DSACKx is
not asserted. Figure 4-30 shows the timing for a bus error that is asserted after DSACKx.
Exceptions are taken in both cases. (Refer to Section 5 CPU32+ for details of bus error
exception processing.)
MOTOROLA
1. DSACKx and HALT are negated, and BERR is asserted.
2. HALT and BERR are negated, and DSACKx is asserted. BERR is then asserted within
one clock cycle (HALT remains negated).
FC3–FC0
DSACKx
D31–D0
A31–A0
CLKO1
BERR
R/W
DS
AS
S0
Freescale Semiconductor, Inc.
Figure 4-29. Bus Error without DSACKx
S2
For More Information On This Product,
READ CYCLE WITH BUS
SW
ERROR
MC68360 USER’S MANUAL
Go to: www.freescale.com
SW
S4
PROCESSING
INTERNAL
S0
S2
STACK
WRITE
S4
Bus Operation
4-43