LAN9420I-NU SMSC, LAN9420I-NU Datasheet - Page 31

IC ETHERNET CTRLR SGL 128VTQFP

LAN9420I-NU

Manufacturer Part Number
LAN9420I-NU
Description
IC ETHERNET CTRLR SGL 128VTQFP
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheets

Specifications of LAN9420I-NU

Controller Type
Ethernet Controller
Interface
PCI
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
145mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.6 V
Maximum Operating Temperature
+ 85 C
Ethernet Connection Type
10/100 Base-T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1085

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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
3.3.4
3.3.5
3.3.5.1
Once enabled, the GPT counts down either until it reaches 0000h, or until a new pre-load value is
written to the GPT_LOAD field. At 0000h, the counter wraps around to FFFFh, asserts the GPT
interrupt status bit (GPT_INT) and the GPT interrupt (if the GPT_INT_EN bit is set), and continues
counting. GPT_INT is a sticky bit (R/WC), Once the GPT_INT bit is asserted, it can only be cleared
by writing a '1' to the bit. The GPT_INT hardware interrupt can only be asserted if the GPT_INT_EN
bit is set.
Free-Run Counter (FRC)
The FRC is a simple 32-bit up counter. The FRC counts at fixed rate of 6.25MHz (160nS resolution).
When the FRC reaches a value of FFFF_FFFFh, it wraps around to 0000_0000h and continues
counting. The FRC is operational in all power states. The FRC has no fixed function in
LAN9420/LAN9420i and is ideal for use by drivers as a timebase. The current FRC count is readable
in FREE_RUN SCSR. Please refer to
for more information on this register.
EEPROM Controller (EPC)
LAN9420/LAN9420i may use an optional, external, EEPROM to store the default values for the MAC
address, PCI Subsystem ID, and PCI Subsystem Vendor ID. The PCI Subsystem ID and PCI
Subsystem Vendor ID are used by the PCI Bridge (PCIB). The MAC address is used as the default
Ethernet MAC address and is loaded into the MAC’s ADDRH and ADDRL registers. If a properly
configured EEPROM is not detected, it is the responsibility of the Host LAN Driver to set the IEEE
addresses.
After a system-level reset occurs, LAN9420/LAN9420i will load the default values from a properly
configured EEPROM. LAN9420/LAN9420i will not accept PCI target transactions until this process is
completed.
The LAN9420/LAN9420i EEPROM controller also allows the Host system to read, write and erase the
contents of the Serial EEPROM. The EEPROM controller supports most “93C46” type EEPROMs
configured for 128 x 8-bit operation.
EEPROM Format
Table 3.2
EEPROM BYTE ADDRESS
illustrates the format in which data is stored inside of the EEPROM.
0Ah
0
1
2
3
4
5
6
7
8
9
Table 3.2 EEPROM Format
DATASHEET
Section 4.2.10, "Free Run Counter (FREE_RUN)," on page 98
31
0xA5
MAC Address [7:0]
MAC Address [15:8]
MAC Address [23:16]
MAC Address [32:24]
MAC Address [39:33]
MAC Address [47:40]
Subsystem Device ID [7:0]
Subsystem Device ID [15:8]
Subsystem Vendor ID [7:0]
Subsystem Vendor ID [15:8]
EEPROM CONTENTS
Revision 1.4 (12-17-08)

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