DP8409AN National Semiconductor, DP8409AN Datasheet

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DP8409AN

Manufacturer Part Number
DP8409AN
Description
IC CONTROLLER DYNAMIC RAM 48-DIP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP8409AN

Controller Type
Dynamic RAM (DRAM) Controller, Drivers
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
250mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
48-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Interface
-
Other names
*DP8409AN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DP8409AN-2
Manufacturer:
NS
Quantity:
6 245
Part Number:
DP8409AN-2
Manufacturer:
NS/国半
Quantity:
20 000
C 1995 National Semiconductor Corporation
DP8409A Multi-Mode Dynamic RAM Controller Driver
General Description
Dynamic memory system designs which formerly required
several support chips to drive the memory array can now
be implemented with a single IC
Mode Dynamic RAM Controller Driver The DP8409A is ca-
pable of driving all 16k and 64k Dynamic RAMs (DRAMs) as
well as 256k DRAMs Since the DP8409A is a one-chip so-
lution (including capacitive-load drivers) it minimizes propa-
gation delay skews the major performance disadvantage of
multiple-chip memory drive and control
The DP8409A’s 8 modes of operation offer a wide selection
of DRAM control capabilities Memory access may be con-
trolled externally or on-chip automatically an on-chip re-
fresh counter makes refreshing (either externally or auto-
matically controlled) less complicated and automatic mem-
ory initialization is both simple and fast
The DP8409A is a 48-pin DRAM Controller Driver with 9
multiplexed address outputs and 6 control signals It con-
sists of two 9-bit address latches a 9-bit refresh counter
and control logic All output drivers are capable of driving
500 pF loads with propagation delays of 25 ns The
DP8409A timing parameters are specified driving the typical
load capacitance of 88 DRAMs including trace capaci-
tance
The DP8409A has 3 mode-control pins M2 M1 and M0
where M2 is in general REFRESH These 3 pins select 8
modes of operation Inputs B1 and B0 in the memory ac-
cess modes (M2
four RAS outputs During normal access the 9 address out-
puts can be selected from the Row Address Latch or the
Column Address Latch During refresh the 9-bit on-chip re-
fresh counter is enabled onto the address bus and in this
mode all RAS outputs are selected while CAS is inhibited
The DP8409A can drive up to 4 banks of DRAMs with each
bank comprised of 16k’s 64k’s or 256k’s Control signal
outputs RAS CAS and WE are provided with the same
drive capability Each RAS output drives one bank of
DRAMs so that the four RAS outputs are used to select the
banks while CAS WE and the multiplexed addresses can
be connected to all of the banks of DRAMs This leaves the
non-selected banks in the standby mode (less than one
tenth of the operating power) with the data outputs in TRI-
STATE
written to or read from
TRI-STATE is a registered trademark of National Semiconductor Corp
PAL is a registered trademark of and used under license with Monolithic Memories Inc
Only the bank with its associated RAS low will be
e
1) are select inputs which select one of
TL F 8409
the DP8409A Multi-
TL F 8409 – 1
Operational Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Mode Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
All DRAM drive functions on one chip minimizes skew
on outputs maximizes AC peformance
On-chip capacitive-load drives (specified to drive up to
88 DRAMs)
Drives directly all 16k 64k and 256k DRAMs
Capable of addressing 64k 256k or 1M words
Propagation delays of 25 ns typical at 500 pF load
CAS goes low automatically after column addresses are
valid if desired
Auto Access mode provides RAS row to column se-
lect then CAS automatically and fast
WE
WRITE or READ-MODIFY-WRITE cycles
On-chip 9-bit refresh counter with selectable End-of-
Count (127 255 or 511)
End-of-Count indicated by RF I O pin going low at 127
255 or 511
Low input on RF I O resets 9-bit refresh counter
CAS inhibited during refresh cycle
Fall-through latches on address inputs controlled by
ADS
TRI-STATE outputs allow multi-controller addressing of
memory
Control output signals go high-impedance logic ‘‘1’’
when disabled for memory sharing
Power-up counter reset control signals high address
outputs TRI-STATE and End-of-Count set to 127
8 modes of operation 3 access 3 refresh and 2
set-up
2 externally controlled modes 1 access and 1 refresh
(Modes 0 4)
2 auto-access modes RAS
with t
Auto-access mode allows Hidden Refreshing (Mode 5)
Forced Refresh requested on RF I O if no Hidden Re-
fresh (Mode 5)
Forced Refresh performed after system acknowledge of
request (Mode 1)
Automatic Burst Refresh mode stops at End-of-Count
of 127 255 or 511 (Mode 2)
2 All-RAS Acces modes externally or automatically con-
trolled for memory initialization (Modes 3a 3b)
Automatic All-RAS mode with external 8-bit counter
frees system for other set-up routines (Mode 3a)
End-of-Count value of Refresh Counter set by B1 and
B0 (Mode 7)
RAH
follows
e
20 or 30 ns minimum (Modes 5 6)
WIN
unconditionally offering
R C
RRD-B30M105 Printed in U S A
CAS automatic
May 1989
READ

Related parts for DP8409AN

DP8409AN Summary of contents

Page 1

... TRI- STATE Only the bank with its associated RAS low will be written to or read from TRI-STATE is a registered trademark of National Semiconductor Corp PAL is a registered trademark of and used under license with Monolithic Memories Inc C 1995 National Semiconductor Corporation TL F 8409 ...

Page 2

... Block and Connection Diagrams Order Number DP8409AD DP8409AN DP8409AN-3 or DP8409AV-2 See NS Package Number D48A N48A or V68A Pin Definitions V GND GND The three supply pins have been assigned to the center of the package to reduce voltage drops both DC and AC There are also two ground ...

Page 3

Pin Definitions (Continued) TABLE I DP8409A Mode Select Options (RFSH) Mode ...

Page 4

Conditions for All Modes (Continued) DP8409A DRIVING ANY 16k OR 64k DRAMs The DP8409A can drive any 16k or 64k DRAMs All 16k DRAMs are basically the same configuration including the newer 5V-only version Hence in most applications differ- ent ...

Page 5

Conditions for All Modes (Continued) When the DP8409A refresh mode the pin indicates that the on-chip refresh counter has reached its end-of-count This end-of-count is selectable as 127 255 or 512 to accommodate 16k ...

Page 6

DP8409A Functional Mode Descriptions MODE 1 AUTOMATIC FORCED REFRESH In Mode 1 the R C (RFCK) pin becomes RFCK (refresh cycle clock) instead and CAS remains high If RFCK is kept permanently high then whenever M2 (RFSH) ...

Page 7

DP8409A Functional Mode Descriptions MODE 2 AUTOMATIC BURST REFRESH This mode is normally used before and or after a DMA op- eration to ensure that all rows remain refreshed provided the DMA transfer takes less than 2 ms (see Figure ...

Page 8

DP8409A Functional Mode Descriptions dress input latch is enabled onto the address bus About 14 ns after the column address is valid CAS goes low (t 14 ns) strobing the column address into the DRAMs e a When RAS and ...

Page 9

DP8409A Functional Mode Descriptions MODE 3b EXTERNALLY CONTROLLED ALL-RAS WRITE To select this mode B1 and B0 must first have been set Mode 7 This mode is useful at system initialization but under processor control The memory ...

Page 10

DP8409A Functional Mode Descriptions FIGURE 7a Read Cycle Timing (Mode 4) FIGURE 7b Write Cycle Timing (Mode 4) (Continued 8409– 8409– 16 ...

Page 11

DP8409A Functional Mode Descriptions Automatic CAS Generation In a normal memory access cycle CAS can be derived from inputs CASIN CASIN is high then R C going low switches the address output drivers from rows to ...

Page 12

DP8409A Functional Mode Descriptions FIGURE 8a Modes 5 6 Timing (CASIN High in Mode 6) FIGURE 8b Mode 6 Timing Extended CAS (Continued 8409 – 8409– 18 ...

Page 13

DP8409A Functional Mode Descriptions FIGURE 9 Hidden Refreshing (Mode 5) and Forced Refreshing (Mode 1) Timing (Continued 8409 – 19 ...

Page 14

DP8409A Functional Mode Descriptions TABLE II Memory Bank Decode Bank Select (Strobed by ADS) Enabled RAS RAS 0 1 RAS 1 0 RAS 1 1 RAS Note that RASIN going low earlier than t CSRL low ...

Page 15

... Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage V CC Storage Temperature Range b Input Voltage Output Current Lead Temperature (Soldering 10 seconds) Electrical Characteristics Symbol Parameter V Input Clamp Voltage ...

Page 16

Switching Characteristics DP8409A DP8409A (unless otherwise noted) (Notes The output load capacitance is typical for 4 banks DRAMs each or ...

Page 17

Switching Characteristics DP8409A DP8409A (unless otherwise noted) (Notes The output load capacitance is typical for 4 banks DRAMs each or ...

Page 18

Switching Characteristics DP8409A DP8409A (unless otherwise noted) (Notes The output load capacitance is typical for 4 banks DRAMs each or ...

Page 19

Switching Characteristics DP8409A (unless otherwise noted) (Notes The output load capacitance is typical for 4 banks DRAMs each or 88 ...

Page 20

Switching Characteristics DP8409A (unless otherwise noted) (Notes The output load capacitance is typical for 4 banks DRAMs each or 88 ...

Page 21

Applications If external control is preferred the DP8409A may be used in Mode Figure 6 If basic auto access and refresh are required then in cases where the user requires the minimum of external complexity ...

Page 22

Applications (Continued) FIGURE 13b DP8409A Auto Refresh 8409– 24 ...

Page 23

... Physical Dimensions inches (millimeters) Order Number DP8409AD DP8409AD-2 or DP8409AD-3 48-Lead Molded Dual-In-Line Package (N) Order Number DP8409AN DP8409AN-2 or DP8409AN-3 48-Lead Dual-In-Line Package (D) NS Package Number D48A NS Package Number N48A 23 ...

Page 24

... Hong Kong Ltd 49) 0-180-530 85 86 13th Floor Straight Block a Ocean Centre 5 Canton Rd 49) 0-180-530 85 85 Tsimshatsui Kowloon a Tel ( 49) 0-180-532 78 32 Hong Kong a 49) 0-180-532 93 58 Tel (852) 2737-1600 a Tel ( 49) 0-180-534 16 80 Fax (852) 2736-9960 a National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 ...

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