CY7C924ADX-AXC Cypress Semiconductor Corp, CY7C924ADX-AXC Datasheet - Page 58

IC TXRX HOTLINK 100LQFP

CY7C924ADX-AXC

Manufacturer Part Number
CY7C924ADX-AXC
Description
IC TXRX HOTLINK 100LQFP
Manufacturer
Cypress Semiconductor Corp
Series
HOTlink™r
Type
Transceiverr
Datasheets

Specifications of CY7C924ADX-AXC

Package / Case
100-LQFP
Protocol
Fibre Channel
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Product
Framer
Number Of Transceivers
1
Data Rate
622 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Supply Current (max)
250 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage (typ)
5V
Screening Level
Commercial
Pin Count
100
Mounting
Surface Mount
Package Type
TQFP
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Ic Interface Type
Parallel, Serial
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
TQFP
No. Of Pins
100
No. Of Receivers
2
Frequency Max
50MHz
Rohs Compliant
Yes
Termination Type
SMD
Filter Terminals
SMD
Driver Case Style
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Compliant
Other names
428-2918
CY7C924ADX-AXC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C924ADX-AXC
Manufacturer:
CY
Quantity:
6
Part Number:
CY7C924ADX-AXC
Manufacturer:
CYPRESS
Quantity:
455
Part Number:
CY7C924ADX-AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-02008 Rev. *E
Document History Page
Document Title: CY7C924ADX 200 MBaud HOTLink
Document Number: 38-02008
REV.
*A
*B
*C
*D
*E
**
105846 03/26/01
107878 07/09/01
118320 11/13/02
123796 01/29/03
201401 01/19/04
988901 See ECN
ECN
NO.
Issue
Date
Change
Orig. of
SZV
KET
REV
KKV
UKK
TNT
Change from Spec number: 38-00770 to 38-02008
Changed the mentioning of PECL inputs and outputs to PECL-compatible inputs and
Changed part number: CY7C924DX to CY7C924ADX
outputs, which is more correct.
Changed the font and centered the part number in the device footprint
Fixed the line wrap issue with DLB[1] and DLB[0]
Changed labels on waveforms to make them more consistent with those in the tables
Changed the I/O labels on the D-type flip flop
Changed mentioning of PAREN to TXPAREN to make data sheet more consistent
Replaced incorrect source copy with correct source copy
Removed parity
Changed device selection requirements when in FIFO Bypass mode
Added comprehensive table showing SPDSEL/RANGESEL and data rate mapping
Cascade mode read timing description changed, receive timing diagram updated to
reflect operation
Serial Address Register access listed as an option for UTOPIA mode only
Changed FIFO reset condition to show that the count in suspended, not reset, when
TXEN* is asserted
Added Lead-free option package and removed Leaded package in ordering information
®
Transceiver
Description of Change
CY7C924ADX
Page 58 of 58
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