VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 146

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

30.2 GMII Mode Receive Timing (1000BASE-T)
For GMII mode, the following specifications are valid when the I/O power supply (VDDIOMAC) is 2.5V or 3.3V, ±10%, and the
MAC/Media Interface Mode Select bits (see
page 129) have been set to GMII mode.
VMDS-10105 Revision 4.1
October 2006
RXD[7:0]
T
T
T
T
F
T
RXCLK-Period
RXCLK-Setup
Symbol
Symbol
RXCLK-High
RXCLK-Hold
RXCLK
TOL-RXCLK
RXCLK-Low
RXDV
RXER
t
t
R
F
-100
Min
Min
2.5
2.5
2.5
0.5
Table 61. GMII Mode Receive Timing (1000BASE-T) Specifications
Typ
Typ
8.0
Figure 38. GMII Receive AC Timing in 1000BASE-T Mode
T
RXCLK-High
Max
Max
+100
1.0
1.0
T
section 25.4.8 “Register 23E (17h) - Extended PHY Control Register #4,”
RXCLK-Period
Unit
Unit
ppm
ns
ns
ns
ns
ns
ns
ns
t
F
146 of 165
0.7V
T
RXCLK-Low
RXCLK clock period.
RXCLK frequency offset tolerance.
RXCLK minimum pulse width high.
RXCLK minimum pulse width low.
RXD[7:0], RXDV, RXER setup time to RXCLK
RXD[7:0], RXDV, RXER hold time to RXCLK
RXCLK clock rise time, measured from 0.7V to 1.9V.
RXCLK clock fall time, measured from 0.7V to 1.9V.
T
RXCLK-Setup
Parameter Description & Conditions
Parameter Description & Conditions
t
R
T
RXCLK-Hold
1.9V
Datasheet
0.7V
1.9V
VSC8211