VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 86

IC PHY 10/100/1000 SGL 117-LBGA

VSC8211XVW

Manufacturer Part Number
VSC8211XVW
Description
IC PHY 10/100/1000 SGL 117-LBGA
Manufacturer
Vitesse Semiconductor Corp
Type
PHY Transceiverr
Datasheets

Specifications of VSC8211XVW

Number Of Drivers/receivers
1/1
Protocol
Gigabit Ethernet
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
117-LBGA
Case
BGA
Dc
07+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
907-1023

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0.12 – Auto-Negotiation Enable
After a power-up, or reset, the PHY automatically activates the Auto-Negotiation state machine, setting bit 0.12 to a “1”. If a “0”
is written to bit 0.12, the Auto-Negotiation process is disabled and the present contents of the PHY’s SMI register bits determine
the operating characteristics. Note that Auto-Negotiation is always required in 1000BASE-T mode.
0.11 – Power-Down
Power-Down functions the same as Software Reset, except that it is not self-clearing, and that R/W SMI bits are not restored to
their default states by Power-Down. The RGMII pins (except for SMI pins MDC, MDIO, and MDINT#) are electrically isolated
during power-down. After Power-Down is released (i.e., set to “0”), the PHY will be ready for normal operation before the next
SMI transaction. If Auto-Negotiation is enabled, the PHY will begin Auto-Negotiation immediately upon exiting Power-Down.
0.10 – Isolate
When Isolate is asserted (i.e., set to “1”), all MAC outputs (except for MDIO) will be high impedance. Operation of the PHY is
otherwise unaffected. For example, if Isolate is asserted while Auto-Negotiation is under way, Auto-Negotiation will continue
unaffected.
0.9 – Restart Auto-Negotiation
When Restart Auto-Negotiation is asserted (i.e., set to “1”), the Auto-Negotiation state machine will restart the Auto-Negotiation
process, even if it is in the midst of an Auto-Negotiation process. This control bit is self-clearing, meaning that it will always
return a “0” when read.
0.8 – Duplex Mode
Bit 0.8 determines the duplex mode of the VSC8211 when Auto-Negotiation is disabled. Changes to the state of Duplex Mode
while Auto-Negotiation is enabled are ignored.
0.7 – Collision Test Enable
Collision Test allows the COL pin (pin B4 in GMII/MII Mode) to be tested during Near End Loopback. When Collision Test is
enabled (by setting this bit), asserting TXEN will cause the COL output to go high within 512 bit times. De-asserting TXEN will
cause the COL output go low within 4 bit times. The Collision Test should only be enabled when Near End Loopback is enabled.
0.5:0 – Reserved
25.3.2 Register 1 (01h) – Mode Status Register - Clause 28/37 View
VMDS-10105 Revision 4.1
October 2006
Bit
15
14
13
12
11
10
9
8
7
6
5
4
Register 1 (01h) – Mode Status Register - Clause 28/37 View
Name
100BASE-T4 Capability
100BASE-X FDX Capability
100BASE-X HDX Capability
10BASE-T FDX Capability
10BASE-T HDX Capability
100BASE-T2 FDX Capability
100BASE-T2 HDX Capability
Extended Status Enable
Reserved
Preamble Suppression Capability RO
Auto-Negotiation Complete
Remote Fault
Access
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO LH
States
1 = 100BASE-T4 capable
1 = 100BASE-X FDX capable
1 = 100BASE-X HDX capable
1 = 10BASE-T FDX capable
1 = 10BASE-T HDX capable
1 = 100BASE-T2 FDX capable
1 = 100BASE-T2 HDX capable
1 = Extended status information present in R15 1
1 = MF preamble may be suppressed
0 = MF preamble always required
1 = Auto-Negotiation complete
0 = Auto-Negotiation not complete
1 = Far-end fault detected
0 = No fault detected
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Reset Value
0
1
1
1
1
0
0
0
1
0
0
Datasheet
VSC8211
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