VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 80

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

24 PHY Register Set Conventions
The user can control the PHY's features, operating modes, etc. by setting the PHY Registers to the desired values. The PHY
provides access to its Registers via the Serial Management Interface. For details on PHY Register access, see
Mode Serial Management Interface (SMI),”
24.1 PHY's Register Set Structure
The register access protocol, as defined by the IEEE 802.3 specification, reserves five bits for register addressing. This limits
the register space to 32, 16 bit wide registers. Of these, registers addressed 0 through 15 are defined by the IEEE 802.3
specification and registers addressed 16 through 31 are vendor specific. To provide extensive feature control of the PHY, the
vendor specific registers addressed 16 through 31 have been divided into two Page views, called PAGE0 and PAGE1, enabling
access to 32 vendor specific registers instead of 16.
PAGE0 is the default page view. To switch to PAGE1, write 0001h to PHY Register 31. To switch to PAGE0 write 0000h to PHY
Register 31.
VMDS-10105 Revision 4.1
October 2006
31
Normal Page
Figure 36. Extended Page Register Diagram
Registers
page 45.
0000
15
16
17
18
19
30
0
1
2
3
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80 of 165
Extended Page
Registers
0001
16E
17E
18E
19E
30E
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Section 13 “Dual
Datasheet
VSC8211