PIC12F683-I/SN Microchip Technology Inc., PIC12F683-I/SN Datasheet - Page 18

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PIC12F683-I/SN

Manufacturer Part Number
PIC12F683-I/SN
Description
8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F683-I/SN

A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
5
Memory Type
Flash
Number Of Bits
8
Package Type
8-pin SOIC-N
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
PIC12F683
3.2.2.6
The Power Control (PCON) register contains flag bits
(see Table 12-2) to differentiate between a:
• Power-on Reset (POR)
• Brown-out Reset (BOR)
• Watchdog Timer Reset (WDT)
• External MCLR Reset
The PCON register also controls the Ultra Low-Power
Wake-up and software enable of the BOR.
The PCON register bits are shown in Register 3-6.
REGISTER 3-6:
DS41211C-page 16
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3-2
bit 1
bit 0
Note 1:
U-0
Set BOREN<1:0> = 01 in the Configuration Word register for this bit to control the BOR.
PCON Register
Unimplemented: Read as ‘0’
ULPWUE: Ultra Low-Power Wake-Up Enable bit
1 = Ultra Low-Power Wake-up enabled
0 = Ultra Low-Power Wake-up disabled
SBOREN: Software BOR Enable bit
1 = BOR enabled
0 = BOR disabled
Unimplemented: Read as ‘0’
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Power-on Reset or Brown-out Reset
occurs)
U-0
PCON: POWER CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
ULPWUE
R/W-0
SBOREN
R/W-1
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
R/W-0
POR
R/W-x
BOR
bit 0

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