PIC12F683-I/SN Microchip Technology Inc., PIC12F683-I/SN Datasheet - Page 82

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PIC12F683-I/SN

Manufacturer Part Number
PIC12F683-I/SN
Description
8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F683-I/SN

A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
5
Memory Type
Flash
Number Of Bits
8
Package Type
8-pin SOIC-N
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
PIC12F683
11.3.4
In Sleep mode, the TMR2 register will not increment
and the state of the module will not change. If the CCP1
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMR2 will continue from its
previous state.
11.3.5
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 3.0 “Oscillator Module (With Fail-Safe
Clock Monitor)” for additional details.
11.3.6
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
DS41211C-page 80
OPERATION IN SLEEP MODE
CHANGES IN SYSTEM CLOCK
FREQUENCY
EFFECTS OF RESET
11.3.7
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
6.
Disable the PWM pin (CCP1) output drivers by
setting the associated TRIS bit.
Set the PWM period by loading the PR2 register.
Configure the CCP module for the PWM mode
by loading the CCP1CON register with the
appropriate values.
Set the PWM duty cycle by loading the CCPR1L
register and DC1B bits of the CCP1CON register.
Configure and start Timer2:
Enable PWM output after a new PWM cycle has
started:
• Clear the TMR2IF interrupt flag bit of the
• Set the Timer2 prescale value by loading the
• Enable Timer2 by setting the TMR2ON bit of
• Wait until Timer2 overflows (TMR2IF bit of
• Enable the CCP1 pin output driver by
PIR1 register.
T2CKPS bits of the T2CON register.
the T2CON register.
the PIR1 register is set).
clearing the associated TRIS bit.
SETUP FOR PWM OPERATION
© 2006 Microchip Technology Inc.

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