PIC12F683-I/SN Microchip Technology Inc., PIC12F683-I/SN Datasheet - Page 41

• Manufacturer Part Number: PIC12F683-I/SN
• Description: 8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F683-I/SN

• A/d Inputs: 4-Channel, 10-Bit
• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 5
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin SOIC-N
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

4.2.5.6
Figure 4-6 shows the diagram for this pin. The GP5 pin
is configurable to function as one of the following:
• a general purpose I/O
• a Timer1 clock input
• a crystal/resonator connection
• a clock input
TABLE 4-1:
© 2006 Microchip Technology Inc.
ANSEL
CCP1CON
CMCON0
PCON
INTCON
IOC
OPTION_REG
GPIO
T1CON
TRISIO
WPU
Legend:
Name
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by GPIO.
GP5/T1CKI/OSC1/CLKIN
T1GINV
GPPU
Bit 7
GIE
SUMMARY OF REGISTERS ASSOCIATED WITH GPIO
—
—
—
—
—
—
—
—
TMR1GE
INTEDG
ADCS2
COUT
Bit 6
PEIE
—
—
—
—
—
—
T1CKPS1 T1CKPS0 T1OSCEN
ULPWUE
TRISIO5
ADCS1
DC1B1
WPU5
T0CS
Bit 5
IOC5
T0IE
GP5
—
SBOREN
TRISIO4
ADCS0
DC1B0
WPU4
T0SE
CINV
INTE
IOC4
Bit 4
GP4
CCP1M3
TRISIO3
ANS3
GPIE
Bit 3
IOC3
PSA
GP3
CIS
—
—
CCP1M2
T1SYNC
TRISIO2
FIGURE 4-6:
WPU2
ANS2
IOC2
Bit 2
CM2
T0IF
PS2
GP2
TRISIO
TRISIO
—
GPIO
GPIO
WPU
WPU
Data
IOC
IOC
Bus
WR
WR
WR
WR
Interrupt-on-
RD
RD
RD
RD
change
Note
CCP1M1
TMR1CS
TRISIO1
WPU1
ANS1
IOC1
Bit 1
POR
INTF
CM1
GP1
PS1
D
D
D
D
To Timer1 or CLKGEN
CK
CK
CK
CK
1: Timer1 LP oscillator enabled.
2: When using Timer1 with LP oscillator, the
Schmitt Trigger is bypassed.
Q
Q
Q
Q
Q
Q
Q
Q
TMR1ON
CCP1M0
TRISIO0
WPU0
ANS0
Bit 0
GPIF
IOC0
CM0
BOR
PS0
GP0
BLOCK DIAGRAM OF GP5
INTOSC
OSC2
Mode
PIC12F683
-000 1111
--00 0000
-0-0 0000
--01 --qq
0000 0000
--00 0000
1111 1111
--xx xxxx
0000 0000
--11 1111
--11 -111
POR, BOR
INTOSC
Value on
GPPU
Mode
Oscillator
RD GPIO
Circuit
TMR1LPEN
Q
Q
DS41211C-page 39
EN
EN
D
D
V
(1)
DD
-000 1111
--00 0000
-0-0 0000
--0u --uu
0000 000x
--00 0000
1111 1111
--x0 x000
0000 0000
--11 1111
--11 -111
Weak
Value on
V
V
all other
Resets
DD
Q3
SS
I/O pin
(1)