PIC16F870-I/SP Microchip Technology Inc., PIC16F870-I/SP Datasheet - Page 137

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PIC16F870-I/SP

Manufacturer Part Number
PIC16F870-I/SP
Description
28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F870-I/SP

A/d Inputs
5-Channel, 10-Bit
Cpu Speed
5 MIPS
Eeprom Memory
64 Bytes
Input Output
22
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F870-I/SP
Manufacturer:
MICROCHIP
Quantity:
5 600
Part Number:
PIC16F870-I/SP
Quantity:
2 871
FIGURE 14-13:
TABLE 14-10: A/D CONVERSION REQUIREMENTS
 2003 Microchip Technology Inc.
130
131
132
134
Note 1:
Param
No.
A/D DATA
Note 1:
SAMPLE
A/D CLK
BSF ADCON0, GO
2:
ADRES
§
T
T
T
T
*
Sym
AD
CNV
ACQ
GO
ADIF
These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
This specification ensured by design.
ADRES register may be read on the following T
See Section 10.1 for min conditions.
GO
Q4
A/D clock period
Conversion time (not including S/H time)
(Note 1)
Acquisition time
Q4 to A/D clock start
If the A/D clock source is selected as RC, a time of T
SLEEP instruction to be executed.
132
A/D CONVERSION TIMING
Characteristic
(T
OSC
/2)
Standard(F)
Extended(LF)
Standard(F)
Extended(LF)
9
(1)
8
OLD_DATA
7
CY
(Note 2)
SAMPLING STOPPED
cycle.
Min
10*
1.6
3.0
2.0
3.0
131
130
CY
T
OSC
Typ†
4.0
6.0
is added before the A/D clock starts. This allows the
40
/2 §
2
Max
6.0
9.0
12
PIC16F870/871
1
Units
T
AD
s
s
s
s
s
s
1 T
0
T
T
A/D RC Mode
A/D RC Mode
The minimum time is the ampli-
fier settling time. This may be
used if the "new" input voltage
has not changed by more than
1 LSb (i.e., 20.0 mV @ 5.12V)
from the last sampled voltage
(as stated on C
If the A/D clock source is
selected as RC, a time of T
added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
CY
OSC
OSC
based, V
based, V
NEW_DATA
DONE
Conditions
DS30569B-page 135
REF
REF
HOLD
).
3.0V
2.0V
CY
is

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