PIC16F870-I/SP Microchip Technology Inc., PIC16F870-I/SP Datasheet - Page 53

• Manufacturer Part Number: PIC16F870-I/SP
• Description: 28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F870-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 64 Bytes
• Input Output: 22
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

6.4
If control bit T1SYNC (T1CON<2>) is set, the external
clock input is not synchronized. The timer continues to
increment asynchronous to the internal phase clocks.
The timer will continue to run during SLEEP and can
generate an interrupt-on-overflow, which will wake-up
the processor. However, special precautions in
software
(Section 6.4.1).
In Asynchronous Counter mode, Timer1 cannot be
used as a time base for capture or compare operations.
6.4.1
Reading TMR1H or TMR1L while the timer is running
from an external asynchronous clock, will ensure a
valid read (taken care of in hardware). However, the
user should keep in mind that reading the 16-bit timer
in two 8-bit values itself, poses certain problems, since
the timer may overflow between the reads.
For writes, it is recommended that the user simply stop
the timer and write the desired values. A write conten-
tion may occur by writing to the timer registers, while
the register is incrementing. This may produce an
unpredictable value in the timer register.
Reading the 16-bit value requires some care.
Examples 12-2 and 12-3 in the PICmicro™ Mid-Range
MCU Family Reference Manual (DS33023) show how
to read and write Timer1 when it is running in
Asynchronous mode.
6.5
A crystal oscillator circuit is built-in between pins T1OSI
(input) and T1OSO (amplifier output). It is enabled by
setting control bit, T1OSCEN (T1CON<3>). The oscil-
lator is a low power oscillator, rated up to 200 kHz. It will
continue to run during SLEEP. It is primarily intended
for use with a 32 kHz crystal. Table 6-1 shows the
capacitor selection for the Timer1 oscillator.
The Timer1 oscillator is identical to the LP oscillator.
The user must provide a software time delay to ensure
proper oscillator start-up.
 2003 Microchip Technology Inc.
Timer1 Operation in
Asynchronous Counter Mode
Timer1 Oscillator
are
READING AND WRITING TIMER1 IN
ASYNCHRONOUS COUNTER
MODE
needed
to
read/write
the
timer
TABLE 6-1:
6.6
If the CCP1 module is configured in Compare mode to
generate a “special event trigger” (CCP1M3:CCP1M0
= 1011), this signal will reset Timer1.
Timer1 must be configured for either Timer or Synchro-
nized Counter mode to take advantage of this feature.
If Timer1 is running in Asynchronous Counter mode,
this RESET operation may not work.
In the event that a write to Timer1 coincides with a
special event trigger from CCP1, the write will take
precedence.
In this mode of operation, the CCPRH:CCPRL register
pair effectively becomes the period register for Timer1.
Note 1:
32.768 kHz
Osc Type
Note:
100 kHz
200 kHz
These values are for design guidance only.
LP
2:
Resetting Timer1 Using a CCP
Trigger Output
Higher capacitance increases the stability
of oscillator, but also increases the start-up
time.
Since each resonator/crystal has its own
characteristics, the user should consult the
resonator/crystal manufacturer for
appropriate values of external components.
The special event triggers from the CCP1
module will not set interrupt flag bit
TMR1IF (PIR1<0>).
Epson C-001R32.768K-A
PIC16F870/871
Epson C-2 100.00 KC-P
100 kHz
200 kHz
32 kHz
STD XTL 200.000 kHz
Freq.
CAPACITOR SELECTION FOR
THE TIMER1 OSCILLATOR
Crystals Tested:
33 pF
15 pF
15 pF
C1
DS30569B-page 51
± 20 PPM
± 20 PPM
± 20 PPM
33 pF
15 pF
15 pF
C2