PIC16F870-I/SP Microchip Technology Inc., PIC16F870-I/SP Datasheet - Page 71

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PIC16F870-I/SP

Manufacturer Part Number
PIC16F870-I/SP
Description
28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F870-I/SP

A/d Inputs
5-Channel, 10-Bit
Cpu Speed
5 MIPS
Eeprom Memory
64 Bytes
Input Output
22
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F870-I/SP
Manufacturer:
MICROCHIP
Quantity:
5 600
Part Number:
PIC16F870-I/SP
Quantity:
2 871
When setting up an Asynchronous Reception, follow
these steps:
1.
2.
3.
4.
5.
TABLE 9-6:
 2003 Microchip Technology Inc.
0Bh, 8Bh,
10Bh,18Bh
0Ch
18h
1Ah
8Ch
98h
99h
Legend:
Note 1:
Address
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH (Section 9.1).
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
If interrupts are desired, then set enable bit
RCIE.
If 9-bit reception is desired, then set bit RX9.
Enable the reception by setting bit CREN.
x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for asynchronous reception.
Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear.
INTCON
PIR1
RCSTA
RCREG USART Receive Register
PIE1
TXSTA
SPBRG Baud Rate Generator Register
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
PSPIF
PSPIE
CSRC
SPEN
Bit 7
GIE
(1)
(1)
ADIF
ADIE
Bit 6
PEIE
RX9
TX9
SREN
TXEN
RCIE
RCIF
Bit 5
T0IE
CREN
SYNC
INTE
TXIE
Bit 4
TXIF
RBIE
Bit 3
6.
7.
8.
9.
10. If using interrupts, ensure that GIE and PEIE
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
BRGH
FERR
Bit 2
T0IF
Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE is set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
If any error occurred, clear the error by clearing
enable bit CREN.
(bits 7 and 6) of the INTCON register are set.
OERR
TRMT
Bit 1
INTF
PIC16F870/871
RX9D
TX9D
Bit 0
R0IF
0000 000x
-000 0000
0000 -00x
0000 0000
0000 -000
0000 -010
0000 0000
POR, BOR
Value on:
DS30569B-page 69
0000 000u
-000 0000
0000 -00x
0000 0000
0000 -000
0000 -010
0000 0000
Value on
RESETS
all other

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