PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 290

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2331/2431/4331/4431
TABLE 23-1:
DS39616B-page 288
a
bbb
BSR
d
dest
f
fs
fd
k
label
mm
*
*+
*-
+*
n
PRODH
PRODL
s
u
WREG
x
TBLPTR
TABLAT
TOS
PC
PCL
PCH
PCLATH
PCLATU
GIE
WDT
TO
PD
C, DC, Z, OV, N
[
(
< >
italics
]
)
Field
OPCODE FIELD DESCRIPTIONS
RAM access bit:
a =
a =
Bit address within an 8-bit file register (0 to 7).
Bank Select Register. Used to select the current RAM bank.
Destination select bit:
d =
d =
Destination either the WREG register or the specified register file location.
8-bit register file address (0x00 to 0xFF).
12-bit register file address (0x000 to 0xFFF). This is the source address.
12-bit register file address (0x000 to 0xFFF). This is the destination address.
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value).
Label name.
The mode of the TBLPTR register for the table read and table write instructions.
Only used with table read and table write instructions:
The relative address (2’s complement number) for relative branch instructions, or the direct address for Call/
Branch and Return instructions.
Product of Multiply high byte.
Product of Multiply low byte.
Fast Call/Return Mode Select bit:
s =
s =
Unused or Unchanged.
Working register (accumulator).
Don't care (
The assembler will generate code with x =
Microchip software tools.
21-bit Table Pointer (points to a Program Memory location).
8-bit Table Latch.
Top-of-Stack.
Program Counter.
Program Counter Low Byte.
Program Counter High Byte.
Program Counter High Byte Latch.
Program Counter Upper Byte Latch.
Global Interrupt Enable bit.
Watchdog Timer.
Time-out bit.
Power-down bit.
ALU status bits Carry, Digit Carry, Zero, Overflow, Negative.
Optional.
Contents.
Assigned to.
Register bit field.
In the set of.
User defined term (font is courier).
0
1
0
1
0
1
No Change to register (such as TBLPTR with table reads and writes).
Post-Increment register (such as TBLPTR with table reads and writes).
Post-Decrement register (such as TBLPTR with table reads and writes).
Pre-Increment register (such as TBLPTR with table reads and writes).
: RAM location in Access RAM (BSR register is ignored)
: RAM bank is specified by BSR register
: store result in WREG
: store result in file register f
: do not update into/from shadow registers
: certain registers loaded into/from shadow registers (Fast mode)
0
or
1
) .
Preliminary
0
. It is the recommended form of use for compatibility with all
Description
 2003 Microchip Technology Inc.